| Message ID | 20231025-ipq5018-misc-v1-1-7d14fde97fe7@quicinc.com |
|---|---|
| State | Accepted |
| Commit | a427dd16e61f3d145bc24f0ed09692fc25931250 |
| Headers | show |
| Series | arm64: dts: qcom: ipq5018: add few more reserved memory regions | expand |
On 10/25/23 18:42, Kathiravan Thirumoorthy wrote: > Like all other IPQ SoCs, bootloader will collect the system RAM contents > upon crash for the post morterm analysis. If we don't reserve the memory > region used by bootloader, obviously linux will consume it and upon next > boot on crash, bootloader will be loaded in the same region, which will > lead to loose some of the data, sometimes we may miss out critical > information. So lets reserve the region used by the bootloader. > > Similarly SBL copies some data into the reserved region and it will be > used in the crash scenario. So reserve 1MB for SBL as well. > > While at it, enable the SMEM support along with TCSR mutex. > > Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> > --- Bit of a "many things at once" but okay Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On 10/25/2023 10:12 PM, Kathiravan Thirumoorthy wrote: > Like all other IPQ SoCs, bootloader will collect the system RAM contents > upon crash for the post morterm analysis. If we don't reserve the memory > region used by bootloader, obviously linux will consume it and upon next > boot on crash, bootloader will be loaded in the same region, which will > lead to loose some of the data, sometimes we may miss out critical > information. So lets reserve the region used by the bootloader. > > Similarly SBL copies some data into the reserved region and it will be > used in the crash scenario. So reserve 1MB for SBL as well. > > While at it, enable the SMEM support along with TCSR mutex. Gentle Reminder... > > Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> > --- > arch/arm64/boot/dts/qcom/ipq5018.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > index 0b739077ed70..6fbdac7a73f5 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > @@ -82,6 +82,24 @@ reserved-memory { > #size-cells = <2>; > ranges; > > + bootloader@4a800000 { > + reg = <0x0 0x4a800000 0x0 0x200000>; > + no-map; > + }; > + > + sbl@4aa00000 { > + reg = <0x0 0x4aa00000 0x0 0x100000>; > + no-map; > + }; > + > + smem@4ab00000 { > + compatible = "qcom,smem"; > + reg = <0x0 0x4ab00000 0x0 0x100000>; > + no-map; > + > + hwlocks = <&tcsr_mutex 3>; > + }; > + > tz_region: tz@4ac00000 { > reg = <0x0 0x4ac00000 0x0 0x200000>; > no-map; > @@ -142,6 +160,12 @@ gcc: clock-controller@1800000 { > #power-domain-cells = <1>; > }; > > + tcsr_mutex: hwlock@1905000 { > + compatible = "qcom,tcsr-mutex"; > + reg = <0x01905000 0x20000>; > + #hwlock-cells = <1>; > + }; > + > sdhc_1: mmc@7804000 { > compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5"; > reg = <0x7804000 0x1000>; > > --- > base-commit: fe1998aa935b44ef873193c0772c43bce74f17dc > change-id: 20231025-ipq5018-misc-414b32eed881 > > Best regards,
On Wed, 25 Oct 2023 22:12:12 +0530, Kathiravan Thirumoorthy wrote: > Like all other IPQ SoCs, bootloader will collect the system RAM contents > upon crash for the post morterm analysis. If we don't reserve the memory > region used by bootloader, obviously linux will consume it and upon next > boot on crash, bootloader will be loaded in the same region, which will > lead to loose some of the data, sometimes we may miss out critical > information. So lets reserve the region used by the bootloader. > > [...] Applied, thanks! [1/1] arm64: dts: qcom: ipq5018: add few more reserved memory regions commit: a427dd16e61f3d145bc24f0ed09692fc25931250 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index 0b739077ed70..6fbdac7a73f5 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -82,6 +82,24 @@ reserved-memory { #size-cells = <2>; ranges; + bootloader@4a800000 { + reg = <0x0 0x4a800000 0x0 0x200000>; + no-map; + }; + + sbl@4aa00000 { + reg = <0x0 0x4aa00000 0x0 0x100000>; + no-map; + }; + + smem@4ab00000 { + compatible = "qcom,smem"; + reg = <0x0 0x4ab00000 0x0 0x100000>; + no-map; + + hwlocks = <&tcsr_mutex 3>; + }; + tz_region: tz@4ac00000 { reg = <0x0 0x4ac00000 0x0 0x200000>; no-map; @@ -142,6 +160,12 @@ gcc: clock-controller@1800000 { #power-domain-cells = <1>; }; + tcsr_mutex: hwlock@1905000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x01905000 0x20000>; + #hwlock-cells = <1>; + }; + sdhc_1: mmc@7804000 { compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5"; reg = <0x7804000 0x1000>;
Like all other IPQ SoCs, bootloader will collect the system RAM contents upon crash for the post morterm analysis. If we don't reserve the memory region used by bootloader, obviously linux will consume it and upon next boot on crash, bootloader will be loaded in the same region, which will lead to loose some of the data, sometimes we may miss out critical information. So lets reserve the region used by the bootloader. Similarly SBL copies some data into the reserved region and it will be used in the crash scenario. So reserve 1MB for SBL as well. While at it, enable the SMEM support along with TCSR mutex. Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) --- base-commit: fe1998aa935b44ef873193c0772c43bce74f17dc change-id: 20231025-ipq5018-misc-414b32eed881 Best regards,