| Message ID | 20231030-ipq5332-nsscc-v1-7-6162a2c65f0a@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add NSS clock controller support for IPQ5332 | expand |
On 10/30/2023 4:43 PM, Krzysztof Kozlowski wrote: > On 30/10/2023 10:47, Kathiravan Thirumoorthy wrote: >> Describe the NSS clock controller node and it's relevant external >> clocks. >> >> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 28 ++++++++++++++++++++++++++++ >> 1 file changed, 28 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi >> index 42e2e48b2bc3..291f14a3f10a 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi >> @@ -15,6 +15,18 @@ / { >> #size-cells = <2>; >> >> clocks { >> + cmn_pll_nss_clk_200m: cmn-pll-nss-clk-200m { > > Node names should be generic. See also an explanation and list of > examples (not exhaustive) in DT specification: > https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > > > so with "clk" suffix, e.g. cmn-pll-nss-1-clk. Sure, will fix it in V2. > >> + compatible = "fixed-clock"; >> + clock-frequency = <200000000>; >> + #clock-cells = <0>; >> + }; >> + >> + cmn_pll_nss_clk_300m: cmn-pll-nss-clk-300m { >> + compatible = "fixed-clock"; >> + clock-frequency = <300000000>; >> + #clock-cells = <0>; >> + }; >> + >> sleep_clk: sleep-clk { >> compatible = "fixed-clock"; >> #clock-cells = <0>; >> @@ -473,6 +485,22 @@ frame@b128000 { >> status = "disabled"; >> }; >> }; > Best regards, > Krzysztof >
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 42e2e48b2bc3..291f14a3f10a 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -15,6 +15,18 @@ / { #size-cells = <2>; clocks { + cmn_pll_nss_clk_200m: cmn-pll-nss-clk-200m { + compatible = "fixed-clock"; + clock-frequency = <200000000>; + #clock-cells = <0>; + }; + + cmn_pll_nss_clk_300m: cmn-pll-nss-clk-300m { + compatible = "fixed-clock"; + clock-frequency = <300000000>; + #clock-cells = <0>; + }; + sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -473,6 +485,22 @@ frame@b128000 { status = "disabled"; }; }; + + nsscc: clock-controller@39b00000{ + compatible = "qcom,ipq5332-nsscc"; + reg = <0x39b00000 0x80000>; + clocks = <&cmn_pll_nss_clk_200m>, + <&cmn_pll_nss_clk_300m>, + <&gcc GPLL0_OUT_AUX>, + <0>, + <0>, + <0>, + <0>, + <&xo_board>; + #clock-cells = <0x1>; + #reset-cells = <0x1>; + #power-domain-cells = <1>; + }; }; timer {
Describe the NSS clock controller node and it's relevant external clocks. Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)