Message ID | 20231117113931.26660-2-quic_sibis@quicinc.com |
---|---|
State | Superseded |
Headers | show |
Series | dts: qcom: Introduce X1E80100 platforms device tree | expand |
On 11/20/23 12:14, Sibi Sankar wrote: > Hey Rob, > > Thanks for taking time to review the series. > > On 11/19/23 21:29, Rob Herring wrote: >> On Fri, Nov 17, 2023 at 05:09:27PM +0530, Sibi Sankar wrote: >>> From: Rajendra Nayak <quic_rjendra@quicinc.com> >>> >>> These are the CPU cores in Qualcomm's X1E80100 SoC. >>> >>> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> >>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> >>> --- >>> >>> v2: >>> * Update the part number from sc8380xp to x1e80100. >>> >>> Documentation/devicetree/bindings/arm/cpus.yaml | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml >>> b/Documentation/devicetree/bindings/arm/cpus.yaml >>> index ffd526363fda..cc5a21b47e26 100644 >>> --- a/Documentation/devicetree/bindings/arm/cpus.yaml >>> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml >>> @@ -198,6 +198,7 @@ properties: >>> - qcom,kryo660 >>> - qcom,kryo685 >>> - qcom,kryo780 >>> + - qcom,oryon >> >> Wasn't it previously said 'oryon' is not specific enough? https://lore.kernel.org/lkml/b165d2cd-e8da-4f6d-9ecf-14df2b803614@linaro.org/ The cpu part numbers were indeed different in engineering samples which has now been fixed in the production version. -Sibi >> >> Also, please describe what oryon is in the commit msg. > > ack. Will add more details in the next re-spin. > > -Sibi > >> >> Rob
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index ffd526363fda..cc5a21b47e26 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -198,6 +198,7 @@ properties: - qcom,kryo660 - qcom,kryo685 - qcom,kryo780 + - qcom,oryon - qcom,scorpion enable-method: