new file mode 100644
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/nuvoton/nuvoton,npcm-bpc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton BMC NPCM BIOS Post Code (bpc) controller
+
+maintainers:
+ - Tomer Maimon <tmaimon77@gmail.com>
+
+description:
+ Nuvoton BMC NPCM BIOS Post Code (BPC) monitoring two configurable I/O
+ addresses written by the host on the bus, the capture data stored in
+ 128-word FIFO.
+
+ NPCM BPC supports capture double words, when using capture
+ double word only I/O address 1 is monitored.
+
+properties:
+ compatible:
+ enum:
+ - nuvoton,npcm750-bpc
+ - nuvoton,npcm845-bpc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ nuvoton,monitor-ports:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Contain monitor I/O addresses on the bus, at least one monitor I/O
+ address required.
+
+ nuvoton,bpc-en-dwcapture:
+ description:
+ If present, Enable FIFO capture of the DWord address according to
+ one address setting.
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - nuvoton,monitor-ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ bpc: bpc@f0007040 {
+ compatible = "nuvoton,npcm750-bpc";
+ reg = <0xf0007040 0x20>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ nuvoton,monitor-ports = <0x80>;
+ };
+...
Added device tree binding documentation for Nuvoton BMC NPCM BIOS Post Code (BPC). The NPCM BPC monitoring two configurable I/O addresses written by the host on the bus. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- .../soc/nuvoton/nuvoton,npcm-bpc.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/nuvoton/nuvoton,npcm-bpc.yaml