diff mbox series

drm/msm/mdss: specify cfg bandwidth for SDM670

Message ID 20231215013222.827975-1-dmitry.baryshkov@linaro.org
State Accepted
Commit 8d35217149daa33358c284aca6a56d5ab92cfc6c
Headers show
Series drm/msm/mdss: specify cfg bandwidth for SDM670 | expand

Commit Message

Dmitry Baryshkov Dec. 15, 2023, 1:32 a.m. UTC
Lower the requested CFG bus bandwidth for the SDM670 platform. The
default value is 153600 kBps, which is twice as big as required by the
platform according to the vendor kernel.

Fixes: a55c8ff252d3 ("drm/msm/mdss: Handle the reg bus ICC path")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/msm_mdss.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Abhinav Kumar Dec. 18, 2023, 10:54 p.m. UTC | #1
On 12/14/2023 5:32 PM, Dmitry Baryshkov wrote:
> Lower the requested CFG bus bandwidth for the SDM670 platform. The
> default value is 153600 kBps, which is twice as big as required by the
> platform according to the vendor kernel.
> 
> Fixes: a55c8ff252d3 ("drm/msm/mdss: Handle the reg bus ICC path")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/msm_mdss.c | 1 +
>   1 file changed, 1 insertion(+)
> 

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Richard Acayan Jan. 11, 2024, 11:14 p.m. UTC | #2
On Fri, Dec 15, 2023 at 03:32:22AM +0200, Dmitry Baryshkov wrote:
> Lower the requested CFG bus bandwidth for the SDM670 platform. The
> default value is 153600 kBps, which is twice as big as required by the
> platform according to the vendor kernel.
>
> Fixes: a55c8ff252d3 ("drm/msm/mdss: Handle the reg bus ICC path")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  drivers/gpu/drm/msm/msm_mdss.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> index 455b2e3a0cdd..35423d10aafa 100644
> --- a/drivers/gpu/drm/msm/msm_mdss.c
> +++ b/drivers/gpu/drm/msm/msm_mdss.c
> @@ -562,6 +562,7 @@ static const struct msm_mdss_data sdm670_data = {
>  	.ubwc_enc_version = UBWC_2_0,
>  	.ubwc_dec_version = UBWC_2_0,
>  	.highest_bank_bit = 1,
> +	.reg_bus_bw = 76800,

This seems to be the bandwidth applied to the "cpu-cfg" path, but it is
not in the device tree yet and is not allowed by schema (for no
particular reason). In sdm670.dtsi, it would be defined as:

	<&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_DISPLAY_CFG 0>

Furthermore, I have not yet emailed the patches that I use to test the
display on SDM670, namely, the panel driver and device tree changes for
the Pixel 3a. Nevertheless, this does not break anything, even with the
interconnect path and everything needed to test.

Tested-by: Richard Acayan <mailingradian@gmail.com>

>  };
>  
>  static const struct msm_mdss_data sdm845_data = {
> -- 
> 2.39.2
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 455b2e3a0cdd..35423d10aafa 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -562,6 +562,7 @@  static const struct msm_mdss_data sdm670_data = {
 	.ubwc_enc_version = UBWC_2_0,
 	.ubwc_dec_version = UBWC_2_0,
 	.highest_bank_bit = 1,
+	.reg_bus_bw = 76800,
 };
 
 static const struct msm_mdss_data sdm845_data = {