diff mbox

[edk2,1/2] Platforms/AMD/Styx: limit VA space to 40 bits

Message ID 1473408939-18044-1-git-send-email-ard.biesheuvel@linaro.org
State New
Headers show

Commit Message

Ard Biesheuvel Sept. 9, 2016, 8:15 a.m. UTC
We can cover the entire MMIO range and 512 GB of memory starting at
0x80_0000_0000 using 40 bits of VA space, both in the page tables and
in the GCD memory map.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

---
 Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc         | 5 +++++
 Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 5 +++++
 2 files changed, 10 insertions(+)

-- 
2.7.4

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Comments

Leif Lindholm Sept. 13, 2016, 10:43 a.m. UTC | #1
On Fri, Sep 09, 2016 at 09:15:38AM +0100, Ard Biesheuvel wrote:
> We can cover the entire MMIO range and 512 GB of memory starting at

> 0x80_0000_0000 using 40 bits of VA space, both in the page tables and

> in the GCD memory map.

> 

> Contributed-under: TianoCore Contribution Agreement 1.0

> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>


Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>


> ---

>  Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc         | 5 +++++

>  Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 5 +++++

>  2 files changed, 10 insertions(+)

> 

> diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc

> index 8a100e0d9a3c..0a987cc3b118 100644

> --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc

> +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc

> @@ -375,6 +375,11 @@ DEFINE DO_KCS    = 0

>    # Size of the region used by UEFI in permanent memory (Reserved 64MB)

>    gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000

>  

> +  # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the

> +  # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below

> +  # that)

> +  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40

> +

>    #

>    # ARM PrimeCell

>    #

> diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc

> index 38c3309dcff1..72ceb8b6994e 100644

> --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc

> +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc

> @@ -382,6 +382,11 @@ DEFINE DO_KCS       = 1

>    # Size of the region used by UEFI in permanent memory (Reserved 64MB)

>    gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000

>  

> +  # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the

> +  # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below

> +  # that)

> +  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40

> +

>    #

>    # ARM PrimeCell

>    #

> -- 

> 2.7.4

> 

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diff mbox

Patch

diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
index 8a100e0d9a3c..0a987cc3b118 100644
--- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
+++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
@@ -375,6 +375,11 @@  DEFINE DO_KCS    = 0
   # Size of the region used by UEFI in permanent memory (Reserved 64MB)
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
 
+  # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the
+  # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below
+  # that)
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
+
   #
   # ARM PrimeCell
   #
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
index 38c3309dcff1..72ceb8b6994e 100644
--- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
@@ -382,6 +382,11 @@  DEFINE DO_KCS       = 1
   # Size of the region used by UEFI in permanent memory (Reserved 64MB)
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
 
+  # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the
+  # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below
+  # that)
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
+
   #
   # ARM PrimeCell
   #