diff mbox series

[v2] wifi: rtl8xxxu: Fix off by one initial RTS rate

Message ID 761e6836-6cd6-4930-91b6-0446834655c5@gmail.com
State New
Headers show
Series [v2] wifi: rtl8xxxu: Fix off by one initial RTS rate | expand

Commit Message

Bitterblue Smith Jan. 2, 2024, 7:33 p.m. UTC
rtl8xxxu_set_basic_rates() sets the wrong initial RTS rate. It sets the
next higher rate than the one it should set, e.g. 36M instead of 24M.

The while loop was supposed to find the index of the most significant
bit which is 1, but it was copied incorrectly from the vendor driver.
Use __fls() instead.

Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
---
v2:
 - Use __fls().
---
 drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

Comments

Kalle Valo Jan. 10, 2024, 2:55 p.m. UTC | #1
Bitterblue Smith <rtl8821cerfe2@gmail.com> wrote:

> rtl8xxxu_set_basic_rates() sets the wrong initial RTS rate. It sets the
> next higher rate than the one it should set, e.g. 36M instead of 24M.
> 
> The while loop was supposed to find the index of the most significant
> bit which is 1, but it was copied incorrectly from the vendor driver.
> Use __fls() instead.
> 
> Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
> Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>

Patch applied to wireless-next.git, thanks.

80850ca041f2 wifi: rtl8xxxu: Fix off by one initial RTS rate
diff mbox series

Patch

diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
index 180907319e8c..2b1b633a1f96 100644
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
@@ -4839,10 +4839,9 @@  static void rtl8xxxu_set_basic_rates(struct rtl8xxxu_priv *priv, u32 rate_cfg)
 
 	dev_dbg(&priv->udev->dev, "%s: rates %08x\n", __func__,	rate_cfg);
 
-	while (rate_cfg) {
-		rate_cfg = (rate_cfg >> 1);
-		rate_idx++;
-	}
+	if (rate_cfg)
+		rate_idx = __fls(rate_cfg);
+
 	rtl8xxxu_write8(priv, REG_INIRTS_RATE_SEL, rate_idx);
 }