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[v3,19/38] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX

Message ID 20240110224408.10444-20-richard.henderson@linaro.org
State New
Headers show
Series tcg: Introduce TCG_COND_TST{EQ,NE} | expand

Commit Message

Richard Henderson Jan. 10, 2024, 10:43 p.m. UTC
... and the inverse, CBZ for TSTEQ.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/aarch64/tcg-target.c.inc | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Philippe Mathieu-Daudé Jan. 22, 2024, 2:20 p.m. UTC | #1
On 10/1/24 23:43, Richard Henderson wrote:
> ... and the inverse, CBZ for TSTEQ.
> 
> Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tcg/aarch64/tcg-target.c.inc | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
> index 55225313ad..0c98c48f68 100644
> --- a/tcg/aarch64/tcg-target.c.inc
> +++ b/tcg/aarch64/tcg-target.c.inc
> @@ -1453,6 +1453,7 @@ static void tcg_out_brcond(TCGContext *s, TCGType ext, TCGCond c, TCGArg a,
>           break;
>       case TCG_COND_LT:
>       case TCG_COND_GE:
> +        /* cmp xN,0; b.mi L -> tbnz xN,63,L */
>           if (b_const && b == 0) {
>               c = (c == TCG_COND_LT ? TCG_COND_TSTNE : TCG_COND_TSTEQ);

This comment ...

>               tbit = ext ? 63 : 31;
> @@ -1461,6 +1462,13 @@ static void tcg_out_brcond(TCGContext *s, TCGType ext, TCGCond c, TCGArg a,
>           break;
>       case TCG_COND_TSTEQ:
>       case TCG_COND_TSTNE:
> +        /* tst xN,0xffffffff; b.ne L -> cbnz wN,L */
> +        if (b_const && b == UINT32_MAX) {
> +            ext = TCG_TYPE_I32;
> +            need_cmp = false;
> +            break;
> +        }
> +        /* tst xN,1<<B; b.ne L -> tbnz xN,B,L */

... and this one belong to the previous patch. Otherwise:

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

>           if (b_const && is_power_of_2(b)) {
>               tbit = ctz64(b);
>               need_cmp = false;
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Patch

diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 55225313ad..0c98c48f68 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1453,6 +1453,7 @@  static void tcg_out_brcond(TCGContext *s, TCGType ext, TCGCond c, TCGArg a,
         break;
     case TCG_COND_LT:
     case TCG_COND_GE:
+        /* cmp xN,0; b.mi L -> tbnz xN,63,L */
         if (b_const && b == 0) {
             c = (c == TCG_COND_LT ? TCG_COND_TSTNE : TCG_COND_TSTEQ);
             tbit = ext ? 63 : 31;
@@ -1461,6 +1462,13 @@  static void tcg_out_brcond(TCGContext *s, TCGType ext, TCGCond c, TCGArg a,
         break;
     case TCG_COND_TSTEQ:
     case TCG_COND_TSTNE:
+        /* tst xN,0xffffffff; b.ne L -> cbnz wN,L */
+        if (b_const && b == UINT32_MAX) {
+            ext = TCG_TYPE_I32;
+            need_cmp = false;
+            break;
+        }
+        /* tst xN,1<<B; b.ne L -> tbnz xN,B,L */
         if (b_const && is_power_of_2(b)) {
             tbit = ctz64(b);
             need_cmp = false;