From patchwork Wed Apr 4 09:47:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 7615 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0FAA423E4C for ; Wed, 4 Apr 2012 09:47:18 +0000 (UTC) Received: from mail-ob0-f180.google.com (mail-ob0-f180.google.com [209.85.214.180]) by fiordland.canonical.com (Postfix) with ESMTP id A8A67A1800C for ; Wed, 4 Apr 2012 09:47:17 +0000 (UTC) Received: by obbun3 with SMTP id un3so111176obb.11 for ; Wed, 04 Apr 2012 02:47:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to :subject:date:message-id:x-mailer:x-gm-message-state; bh=Bl8wH8jG9MtJ16S0j9j0h9Zk3DuHzUDK6uaNVLRQZ6Y=; b=pHE30rcwsogQ8lK8zS/EwfX6izZZxV2SJjbeP1uZhBzKdZh8JkgIiMm+ibqbauBJmZ juCcHxJqatUoUIhCEHFp2mzGUBnB+KRneDDT9ybln7U//mKRTTgZxFNu+CA5464essbj 8ovSw+26kFzXudXBx7DpRxGTYBqfQcI1l65/UZLiW6Dy3h2aURsJguxMOc9TmxAQ9fX5 Bms9ICsgoDK0hhJn9Vblj/LFk1rSp7O9Et0wm+5u0r5/lyYF8EwnxJ89MUErnsuijKoO UtAQOP0AouVMVtyfZDNqi92//Kt2xTWZG6b1byZOTSdTPTHXbohOZifTp52CEsW1V6Rd 6uEg== Received: by 10.50.94.229 with SMTP id df5mr1010404igb.1.1333532836994; Wed, 04 Apr 2012 02:47:16 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.164.217 with SMTP id f25csp31429iby; Wed, 4 Apr 2012 02:47:16 -0700 (PDT) Received: by 10.180.88.164 with SMTP id bh4mr3594279wib.22.1333532835075; Wed, 04 Apr 2012 02:47:15 -0700 (PDT) Received: from mail-we0-f178.google.com (mail-we0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id t45si144252wec.26.2012.04.04.02.47.14 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Apr 2012 02:47:15 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of daniel.lezcano@linaro.org) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of daniel.lezcano@linaro.org) smtp.mail=daniel.lezcano@linaro.org Received: by wera13 with SMTP id a13so66337wer.37 for ; Wed, 04 Apr 2012 02:47:14 -0700 (PDT) Received: by 10.180.80.70 with SMTP id p6mr3598932wix.21.1333532834293; Wed, 04 Apr 2012 02:47:14 -0700 (PDT) Received: from localhost.localdomain (AToulouse-159-1-7-136.w90-60.abo.wanadoo.fr. [90.60.242.136]) by mx.google.com with ESMTPS id l5sm3490037wia.11.2012.04.04.02.47.12 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Apr 2012 02:47:13 -0700 (PDT) From: Daniel Lezcano To: patches@linaro.org Subject: [PATCH] mfd : dbx500 : fix compilation error Date: Wed, 4 Apr 2012 11:47:12 +0200 Message-Id: <1333532832-10455-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.5.4 X-Gm-Message-State: ALoCoQlAAQKtz1ihubSDzSit7SCKVZCG8wvpDTLzLgpiyCsrPPDu85PmasNPZK2D+p4i4ny4/dVt The ux500 default config enables the db5500 and the db8500. The incoming cpuidle driver uses the 'prcmu_enable_wakeups' and the 'prcmu_set_power_state' functions but these ones are defined but not implemented for the db5500, leading to an unresolved symbol error at link time. In order to compile, we have to disable the db5500 support which is not acceptable for the default config. I noticed there are also some other functions which are defined but not implemented. This patch fix this by removing the functions definitions and move out of the config section the empty functions which are normally used when the DB550 config is disabled. Only the functions which are not implemented are concerned by this modification. Signed-off-by: Daniel Lezcano --- include/linux/mfd/db5500-prcmu.h | 88 ++++++++++++++++---------------------- 1 files changed, 37 insertions(+), 51 deletions(-) diff --git a/include/linux/mfd/db5500-prcmu.h b/include/linux/mfd/db5500-prcmu.h index 9890687..5a049df 100644 --- a/include/linux/mfd/db5500-prcmu.h +++ b/include/linux/mfd/db5500-prcmu.h @@ -8,41 +8,14 @@ #ifndef __MFD_DB5500_PRCMU_H #define __MFD_DB5500_PRCMU_H -#ifdef CONFIG_MFD_DB5500_PRCMU - -void db5500_prcmu_early_init(void); -int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state); -int db5500_prcmu_set_display_clocks(void); -int db5500_prcmu_disable_dsipll(void); -int db5500_prcmu_enable_dsipll(void); -int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); -int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); -void db5500_prcmu_enable_wakeups(u32 wakeups); -int db5500_prcmu_request_clock(u8 clock, bool enable); -void db5500_prcmu_config_abb_event_readout(u32 abb_events); -void db5500_prcmu_get_abb_event_buffer(void __iomem **buf); -int prcmu_resetout(u8 resoutn, u8 state); -int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, - bool keep_ap_pll); -int db5500_prcmu_config_esram0_deep_sleep(u8 state); -void db5500_prcmu_system_reset(u16 reset_code); -u16 db5500_prcmu_get_reset_code(void); -bool db5500_prcmu_is_ac_wake_requested(void); -int db5500_prcmu_set_arm_opp(u8 opp); -int db5500_prcmu_get_arm_opp(void); - -#else /* !CONFIG_UX500_SOC_DB5500 */ - -static inline void db5500_prcmu_early_init(void) {} - -static inline int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size) +static inline int prcmu_resetout(u8 resoutn, u8 state) { - return -ENOSYS; + return 0; } -static inline int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) +static inline int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state) { - return -ENOSYS; + return 0; } static inline int db5500_prcmu_request_clock(u8 clock, bool enable) @@ -50,69 +23,82 @@ static inline int db5500_prcmu_request_clock(u8 clock, bool enable) return 0; } -static inline int db5500_prcmu_set_display_clocks(void) +static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, + bool keep_ap_pll) { return 0; } -static inline int db5500_prcmu_disable_dsipll(void) +static inline int db5500_prcmu_config_esram0_deep_sleep(u8 state) { return 0; } -static inline int db5500_prcmu_enable_dsipll(void) +static inline u16 db5500_prcmu_get_reset_code(void) { return 0; } -static inline int db5500_prcmu_config_esram0_deep_sleep(u8 state) +static inline bool db5500_prcmu_is_ac_wake_requested(void) { return 0; } -static inline void db5500_prcmu_enable_wakeups(u32 wakeups) {} - -static inline int prcmu_resetout(u8 resoutn, u8 state) +static inline int db5500_prcmu_set_arm_opp(u8 opp) { return 0; } -static inline int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state) +static inline int db5500_prcmu_get_arm_opp(void) { return 0; } -static inline void db5500_prcmu_get_abb_event_buffer(void __iomem **buf) {} static inline void db5500_prcmu_config_abb_event_readout(u32 abb_events) {} -static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, - bool keep_ap_pll) -{ - return 0; -} +static inline void db5500_prcmu_get_abb_event_buffer(void __iomem **buf) {} static inline void db5500_prcmu_system_reset(u16 reset_code) {} -static inline u16 db5500_prcmu_get_reset_code(void) +static inline void db5500_prcmu_enable_wakeups(u32 wakeups) {} + +#ifdef CONFIG_MFD_DB5500_PRCMU + +void db5500_prcmu_early_init(void); +int db5500_prcmu_set_display_clocks(void); +int db5500_prcmu_disable_dsipll(void); +int db5500_prcmu_enable_dsipll(void); +int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); +int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); + +#else /* !CONFIG_UX500_SOC_DB5500 */ + +static inline void db5500_prcmu_early_init(void) {} + +static inline int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size) { - return 0; + return -ENOSYS; } -static inline bool db5500_prcmu_is_ac_wake_requested(void) +static inline int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) { - return 0; + return -ENOSYS; } -static inline int db5500_prcmu_set_arm_opp(u8 opp) +static inline int db5500_prcmu_set_display_clocks(void) { return 0; } -static inline int db5500_prcmu_get_arm_opp(void) +static inline int db5500_prcmu_disable_dsipll(void) { return 0; } +static inline int db5500_prcmu_enable_dsipll(void) +{ + return 0; +} #endif /* CONFIG_MFD_DB5500_PRCMU */