| Message ID | 413d612f-0e31-6281-64e3-6484b85afe06@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Proposal for QCOM PCIe switch power and configuration driver | expand |
++CC Philipp Zabel ( reset controller maintainer) & Bjorn & PCI list from PCIe subsytem. On 1/11/2024 11:20 PM, Krzysztof Kozlowski wrote: > On 11/01/2024 18:38, Krishna Chaitanya Chundru wrote: >> Hi DT maintainers, >> >> We are trying to upstream the QCOM PCIe switch which has I2C interface >> to configure the switch. >> >> In generic a PCIe switch is a device that allows expansion of PCI >> Express hierarchy, which allows more devices(PCIe endpoints) to be >> connected to a single PCIe port. >> >> We need to configure the QCOM switch like L0s, L1ss entry times, Tx >> amplitudes etc.. through I2C interface before PCIe link is established >> as these settings can affect link stability if we don't configure them. >> >> Once PCIe switch is configured, PCIe link between the PCIe switch and >> PCIe port connected should be established by the QCOM PCIe controller >> driver to enumerate the PCIe endpoints connected to the PCIe switch. >> >> We had a QCOM switch driver which powers on the switch and do the I2C >> configurations. >> >> This is how the flow goes. >> -->Power on the switch >> -->Do Switch configuration (over i2c) with qcom switch driver >> -->PCIe link training and enumeration. > > And where is the PCI controller in this? Why isn't this represented like > I2C or GPIO expander? You need to describe what exactly the switch is doing. > The PCIe link training and enumeration is handled by PCIe controller driver. Usually a single endpoint will be connected to PCIe port, using a switch we can connect multiple endpoints like WLAN, NVME, PCIe to ethernet bridge etc. So in single instance of PCIe multiple endpoints are connected and enumerated. Like I2C or GPIO expander we don't want to configure any endpoints, here we are trying to solve the initialization part of the switch power to the switch and configuration of the switch before PCIe controller starts link training and enumeration. > Also, how about using existing solutions? Aren't there any? I am not > going to look for them for you... > As of I know we don't have any solutions exiting now, we are trying to explore different ways for it. > Anyway, you should ask (means Cc) reset controller maintainers if they > are happy for such usage of reset framework for something not being a > reset. For similar reasons you should Cc PCI maintainers. If you ask me, > then no, PCI switch does not look like reset line so, you should not use > reset lines. > I added both maintainers now. sorry for the miss. We want to use reset line because I2c driver has to power on the device and configure the switch only before PCIe controller driver probes. This is how reset controller operates(correct me if I was wrong). Thanks & Regards, Krishna Chaitanya. > Best regards, > Krzysztof >
On 12/01/2024 05:16, Krishna Chaitanya Chundru wrote: > ++CC Philipp Zabel ( reset controller maintainer) & Bjorn & PCI list > from PCIe subsytem. > > On 1/11/2024 11:20 PM, Krzysztof Kozlowski wrote: >> On 11/01/2024 18:38, Krishna Chaitanya Chundru wrote: >>> Hi DT maintainers, >>> >>> We are trying to upstream the QCOM PCIe switch which has I2C interface >>> to configure the switch. >>> >>> In generic a PCIe switch is a device that allows expansion of PCI >>> Express hierarchy, which allows more devices(PCIe endpoints) to be >>> connected to a single PCIe port. >>> >>> We need to configure the QCOM switch like L0s, L1ss entry times, Tx >>> amplitudes etc.. through I2C interface before PCIe link is established >>> as these settings can affect link stability if we don't configure them. >>> >>> Once PCIe switch is configured, PCIe link between the PCIe switch and >>> PCIe port connected should be established by the QCOM PCIe controller >>> driver to enumerate the PCIe endpoints connected to the PCIe switch. >>> >>> We had a QCOM switch driver which powers on the switch and do the I2C >>> configurations. >>> >>> This is how the flow goes. >>> -->Power on the switch >>> -->Do Switch configuration (over i2c) with qcom switch driver >>> -->PCIe link training and enumeration. >> >> And where is the PCI controller in this? Why isn't this represented like >> I2C or GPIO expander? You need to describe what exactly the switch is doing. >> > The PCIe link training and enumeration is handled by PCIe controller driver. > Usually a single endpoint will be connected to PCIe port, using a switch > we can connect multiple endpoints like WLAN, NVME, PCIe to ethernet > bridge etc. So in single instance of PCIe multiple endpoints are > connected and enumerated. > Like I2C or GPIO expander we don't want to configure any endpoints, here > we are trying to solve the initialization part of the switch power to > the switch and configuration of the switch before PCIe controller starts > link training and enumeration. Post your datasheet or at least send some diagrams describing everything, so I won't have to keep guessing. > >> Also, how about using existing solutions? Aren't there any? I am not >> going to look for them for you... >> > As of I know we don't have any solutions exiting now, we are trying to > explore different ways for it. So did you look it up? How much? If I find one, in the drivers, what then? Can you look for it first? >> Anyway, you should ask (means Cc) reset controller maintainers if they >> are happy for such usage of reset framework for something not being a >> reset. For similar reasons you should Cc PCI maintainers. If you ask me, >> then no, PCI switch does not look like reset line so, you should not use >> reset lines. >> > I added both maintainers now. sorry for the miss. > We want to use reset line because I2c driver has to power on the device > and configure the switch only before PCIe controller driver probes. Let's don't repeat the style of discussion we have with Luo Jie, where I say this is not reset and you say "but we want" and use some ridiculous argument. > This is how reset controller operates(correct me if I was wrong). I talk about bindings. Otherwise why would you Cc me? Just because something has power it is a reset? No, it is not. You said about configuring lines: reset does not do this. I am really tired of such discussions after last time. Getting half-baked answers from you, incomplete pictures and something just to respond to my question without providing anything valuable, because you do not want to disclose too much. I got really disappointed last time and this will affect further submissions from you. That's how reputation works, sorry. Just because it controls power, among many other things, does not mean it is a reset. Maybe it is a phy? Or a mux? How do I know? Do you expect me to guess? Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 2ff549f4dc7a..222206902305 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -414,6 +414,18 @@ &lpass_va_macro { vdd-micb-supply = <&vreg_bob>; }; +&i2c0 { + clock-frequency = <100000>; + status = "okay"; + + pcie_switch: pcie-switch@77 { + compatible = "qcom,switch-i2c"; + reg = <0x77>; + vdda-supply = <&pcie_switch_rest_vreg>; + status = "okay"; + }; +}; + &pcie1 { status = "okay"; perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; @@ -422,6 +434,10 @@ &pcie1 { pinctrl-names = "default"; pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>; + + resets = <&gcc GCC_PCIE_1_BCR>, + <&pcie_switch 0>; + reset-names = "pci","device"; }; Can you please tell us whether this approach is acceptable or not?
Hi DT maintainers, We are trying to upstream the QCOM PCIe switch which has I2C interface to configure the switch. In generic a PCIe switch is a device that allows expansion of PCI Express hierarchy, which allows more devices(PCIe endpoints) to be connected to a single PCIe port. We need to configure the QCOM switch like L0s, L1ss entry times, Tx amplitudes etc.. through I2C interface before PCIe link is established as these settings can affect link stability if we don't configure them. Once PCIe switch is configured, PCIe link between the PCIe switch and PCIe port connected should be established by the QCOM PCIe controller driver to enumerate the PCIe endpoints connected to the PCIe switch. We had a QCOM switch driver which powers on the switch and do the I2C configurations. This is how the flow goes. -->Power on the switch -->Do Switch configuration (over i2c) with qcom switch driver -->PCIe link training and enumeration. From the the above requirements we want a I2C client driver which probes first and power's on the switch and do switch configurations through I2C, and then PCIe driver needs to probe and do the link training and enumeration. And for suspend resume usecase also we need these probe dependencies. As we can't keep the probe dependencies between PCIe controller driver and I2C client driver in the DT, we want to propose following solution. Since the I2C driver need to configure the switch and power it on before the PCIe driver attempts to probe the device, we thought of exposing a reset controller from the I2C driver. We came up with this reset controller idea because the I2C driver essentially has to configure the switch and power on the device, then only the PCIe driver has to probe the switch. This aligns with how reset controller operates in general. This is how sample DT looks like we are open for any other suggestions also. Thanks & Regards, Krishna Chaitanya.