From patchwork Wed Apr 4 20:12:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 7641 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 06B1D23E47 for ; Wed, 4 Apr 2012 20:13:13 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id C33ADA1812C for ; Wed, 4 Apr 2012 20:13:12 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so1063293iag.11 for ; Wed, 04 Apr 2012 13:13:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=1871lRzWsXF9Dt6Ny4fJacmmKVd3ZcU2an5Nt4bKr04=; b=LvVk1GY40aXvUk7HwFC/c6a5ib0XwkhwxmeXpGQIBUAiuIfncoaRyYWLSPAMt9/yKd MD8GrbqUgyLt0P3JRe+WYN2yS0+vYsMsfUFzLJyDfrdOQCV/js8AxU1fD3GvF+M38ZhU bMOf77Yu4lb4Zu5rkAyia6mj6KbdZEsuAw7tev77U2vx4NQ4lAiqRqH2TuVBLgogmOAJ NwqGDVG6mN5QkO0zc0zxgrXjItDmBY+Dbhpx6LkFwL+6sKZWMKvz/ymV3IkVLZTY6C03 Vqhuk+v7/16jezXPE5LIBXNb8XMw4t6/Tv4zDsGI5k9yeggXJxU/CvoKQVmnxjIvbEjH iWXw== Received: by 10.42.155.9 with SMTP id s9mr10828404icw.51.1333570392542; Wed, 04 Apr 2012 13:13:12 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.164.217 with SMTP id f25csp56474iby; Wed, 4 Apr 2012 13:13:11 -0700 (PDT) Received: by 10.213.8.135 with SMTP id h7mr43731ebh.168.1333570391221; Wed, 04 Apr 2012 13:13:11 -0700 (PDT) Received: from mail-wg0-f50.google.com (mail-wg0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id n52si1979021wed.91.2012.04.04.13.13.10 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Apr 2012 13:13:11 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of daniel.lezcano@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of daniel.lezcano@linaro.org) smtp.mail=daniel.lezcano@linaro.org Received: by mail-wg0-f50.google.com with SMTP id ds12so644793wgb.31 for ; Wed, 04 Apr 2012 13:13:10 -0700 (PDT) Received: by 10.216.131.34 with SMTP id l34mr2185663wei.54.1333570390730; Wed, 04 Apr 2012 13:13:10 -0700 (PDT) Received: from localhost.localdomain (AToulouse-159-1-7-136.w90-60.abo.wanadoo.fr. [90.60.242.136]) by mx.google.com with ESMTPS id gd4sm6869495wib.6.2012.04.04.13.13.08 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Apr 2012 13:13:09 -0700 (PDT) From: Daniel Lezcano To: santosh.shilimkar@ti.com, jean.pihet@newoldbits.com, khilman@ti.com, tony@atomide.com Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rob.lee@linaro.org, linaro-dev@lists.linaro.org, patches@linaro.org Subject: [PATCH 09/17][V2] ARM: OMAP3: define cpuidle statically Date: Wed, 4 Apr 2012 22:12:43 +0200 Message-Id: <1333570371-1389-10-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1333570371-1389-1-git-send-email-daniel.lezcano@linaro.org> References: <1333570371-1389-1-git-send-email-daniel.lezcano@linaro.org> X-Gm-Message-State: ALoCoQliO8iD109V03qWs276bRQyt0TtoJu3NyImlQWMNzQiXrFTC3TDk7pIqLFXuoAR14xJiZz2 Use the new cpuidle API and define in the driver the states. Signed-off-by: Daniel Lezcano Reviewed-by: Jean Pihet --- arch/arm/mach-omap2/cpuidle34xx.c | 86 +++++++++++++++++++++++++----------- 1 files changed, 60 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 3519a8b..11a2c23 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -301,23 +301,68 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); struct cpuidle_driver omap3_idle_driver = { .name = "omap3_idle", .owner = THIS_MODULE, + .states = { + { + .enter = omap3_enter_idle, + .exit_latency = 2 + 2, + .target_residency = 5, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C1", + .desc = "MPU ON + CORE ON", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 10 + 10, + .target_residency = 30, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C2", + .desc = "MPU ON + CORE ON", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 50 + 50, + .target_residency = 300, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C3", + .desc = "MPU RET + CORE ON", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 1500 + 1800, + .target_residency = 4000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C4", + .desc = "MPU OFF + CORE ON", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 2500 + 7500, + .target_residency = 12000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C5", + .desc = "MPU RET + CORE RET", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 3000 + 8500, + .target_residency = 15000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C6", + .desc = "MPU OFF + CORE RET", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 10000 + 30000, + .target_residency = 30000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C7", + .desc = "MPU OFF + CORE OFF", + }, + }, + .state_count = OMAP3_NUM_STATES, + .safe_state_index = 0, }; -/* Helper to fill the C-state common data*/ -static inline void _fill_cstate(struct cpuidle_driver *drv, - int idx, const char *descr) -{ - struct cpuidle_state *state = &drv->states[idx]; - - state->exit_latency = cpuidle_params_table[idx].exit_latency; - state->target_residency = cpuidle_params_table[idx].target_residency; - state->flags = CPUIDLE_FLAG_TIME_VALID; - state->enter = omap3_enter_idle_bm; - sprintf(state->name, "C%d", idx + 1); - strncpy(state->desc, descr, CPUIDLE_DESC_LEN); - -} - /* Helper to register the driver_data */ static inline struct omap3_idle_statedata *_fill_cstate_usage( struct cpuidle_device *dev, @@ -350,50 +395,40 @@ int __init omap3_idle_init(void) cam_pd = pwrdm_lookup("cam_pwrdm"); - drv->safe_state_index = -1; dev = &per_cpu(omap3_idle_dev, smp_processor_id()); /* C1 . MPU WFI + Core active */ - _fill_cstate(drv, 0, "MPU ON + CORE ON"); - (&drv->states[0])->enter = omap3_enter_idle; - drv->safe_state_index = 0; cx = _fill_cstate_usage(dev, 0); cx->valid = 1; /* C1 is always valid */ cx->mpu_state = PWRDM_POWER_ON; cx->core_state = PWRDM_POWER_ON; /* C2 . MPU WFI + Core inactive */ - _fill_cstate(drv, 1, "MPU ON + CORE ON"); cx = _fill_cstate_usage(dev, 1); cx->mpu_state = PWRDM_POWER_ON; cx->core_state = PWRDM_POWER_ON; /* C3 . MPU CSWR + Core inactive */ - _fill_cstate(drv, 2, "MPU RET + CORE ON"); cx = _fill_cstate_usage(dev, 2); cx->mpu_state = PWRDM_POWER_RET; cx->core_state = PWRDM_POWER_ON; /* C4 . MPU OFF + Core inactive */ - _fill_cstate(drv, 3, "MPU OFF + CORE ON"); cx = _fill_cstate_usage(dev, 3); cx->mpu_state = PWRDM_POWER_OFF; cx->core_state = PWRDM_POWER_ON; /* C5 . MPU RET + Core RET */ - _fill_cstate(drv, 4, "MPU RET + CORE RET"); cx = _fill_cstate_usage(dev, 4); cx->mpu_state = PWRDM_POWER_RET; cx->core_state = PWRDM_POWER_RET; /* C6 . MPU OFF + Core RET */ - _fill_cstate(drv, 5, "MPU OFF + CORE RET"); cx = _fill_cstate_usage(dev, 5); cx->mpu_state = PWRDM_POWER_OFF; cx->core_state = PWRDM_POWER_RET; /* C7 . MPU OFF + Core OFF */ - _fill_cstate(drv, 6, "MPU OFF + CORE OFF"); cx = _fill_cstate_usage(dev, 6); /* * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot @@ -411,7 +446,6 @@ int __init omap3_idle_init(void) drv->state_count = OMAP3_NUM_STATES; cpuidle_register_driver(&omap3_idle_driver); - dev->state_count = OMAP3_NUM_STATES; if (cpuidle_register_device(dev)) { printk(KERN_ERR "%s: CPUidle register device failed\n", __func__);