Message ID | 20240123-msm8953-mdss-reset-v1-2-bb8c6d3ce897@z3ntu.xyz |
---|---|
State | New |
Headers | show |
Series | Add MDSS_BCR reset for MSM8953 | expand |
On Mittwoch, 24. Jänner 2024 13:10:53 CET Konrad Dybcio wrote: > On 1/23/24 22:03, Luca Weiss wrote: > > From: Vladimir Lypak <vladimir.lypak@gmail.com> > > > > Add an entry in the gcc driver for the MDSS_BCR reset found on MSM8953. > > > > Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> > > [luca: expand commit message, move entry] > > Signed-off-by: Luca Weiss <luca@z3ntu.xyz> > > --- > > I found some more definitions in lk2nd > > 88:#define GCC_CRYPTO_BCR (CLK_CTL_BASE + 0x16000) > 106:#define SDCC1_BCR (CLK_CTL_BASE + 0x42000) /* > block reset*/ 125:#define SDCC2_BCR (CLK_CTL_BASE > + 0x43000) /* block reset */ 150:#define USB_HS_BCR > (CLK_CTL_BASE + 0x41000) 155:#define GCC_QUSB2_PHY_BCR > (CLK_CTL_BASE + 0x4103C) 168:#define USB_30_BCR > (CLK_CTL_BASE + 0x3F070) > 189:#define USB3_PHY_BCR (CLK_CTL_BASE + 0x3F034) > 190:#define USB3PHY_PHY_BCR (CLK_CTL_BASE + 0x3F03C) > > Couldn't find this one though, did you confirm that MDSS goes off > when you assert it? That one's defined here: https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-4.9/+/refs/heads/int/13/fp3/arch/arm64/boot/dts/qcom/msm8953-mdss-pll.dtsi#21 I'll add some of the others in v2. > > Konrad
diff --git a/drivers/clk/qcom/gcc-msm8953.c b/drivers/clk/qcom/gcc-msm8953.c index 3e5a8cb14d4d..5725857faae6 100644 --- a/drivers/clk/qcom/gcc-msm8953.c +++ b/drivers/clk/qcom/gcc-msm8953.c @@ -4171,6 +4171,7 @@ static const struct qcom_reset_map gcc_msm8953_resets[] = { [GCC_USB3PHY_PHY_BCR] = { 0x3f03c }, [GCC_USB3_PHY_BCR] = { 0x3f034 }, [GCC_USB_30_BCR] = { 0x3f070 }, + [GCC_MDSS_BCR] = { 0x4d074 }, }; static const struct regmap_config gcc_msm8953_regmap_config = {