| Message ID | 20240123-sa8295p-gpu-v3-1-d5b4474c8f33@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: qcom: sa8295p: Enable GPU | expand |
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index f369fa34e00c..c0dd24c9dcb3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -53,6 +53,9 @@ properties: power-domains: maxItems: 1 + vdd-gfx-supply: + description: Regulator supply for the VDD_GFX pads + '#clock-cells': const: 1 @@ -74,6 +77,19 @@ required: - '#reset-cells' - '#power-domain-cells' +# Allow either power-domains or vdd-gfx-supply, not both +oneOf: + - required: + - power-domains + - required: + - vdd-gfx-supply + - not: + anyOf: + - required: + - power-domains + - required: + - vdd-gfx-supply + additionalProperties: false examples:
In some designs the SoC's VDD_GFX pads are supplied by an external regulator, rather than a power-domain. Allow this to be described in the GPU clock controller binding. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> --- Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)