Message ID | 20240129051104.1855487-8-quic_devipriy@quicinc.com |
---|---|
State | New |
Headers | show
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Mon, 29 Jan 2024 05:12:13 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40T5CDiI021540 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 29 Jan 2024 05:12:13 GMT Received: from hu-devipriy-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Sun, 28 Jan 2024 21:12:06 -0800 From: Devi Priya <quic_devipriy@quicinc.com> To: <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <catalin.marinas@arm.com>, <will@kernel.org>, <p.zabel@pengutronix.de>, <richardcochran@gmail.com>, <geert+renesas@glider.be>, <arnd@arndb.de>, <neil.armstrong@linaro.org>, <nfraprado@collabora.com>, <m.szyprowski@samsung.com> CC: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <netdev@vger.kernel.org>, <quic_devipriy@quicinc.com> Subject: [PATCH V3 7/7] arm64: defconfig: Build NSS Clock Controller driver for IPQ9574 Date: Mon, 29 Jan 2024 10:41:04 +0530 Message-ID: <20240129051104.1855487-8-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129051104.1855487-1-quic_devipriy@quicinc.com> References: <20240129051104.1855487-1-quic_devipriy@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: <devicetree.vger.kernel.org> List-Subscribe: <mailto:devicetree+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:devicetree+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 8euuNwnrCUEEcQYCFcC8QwIBwD6hIS8g X-Proofpoint-ORIG-GUID: 8euuNwnrCUEEcQYCFcC8QwIBwD6hIS8g X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-29_02,2024-01-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=823 clxscore=1015 spamscore=0 mlxscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401190000 definitions=main-2401290035 |
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Add NSS clock controller support for IPQ9574
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diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e6cf3e5d63c3..00e7f3112d53 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1255,6 +1255,7 @@ CONFIG_IPQ_GCC_5332=y CONFIG_IPQ_GCC_6018=y CONFIG_IPQ_GCC_8074=y CONFIG_IPQ_GCC_9574=y +CONFIG_IPQ_NSSCC_9574=m CONFIG_MSM_GCC_8916=y CONFIG_MSM_MMCC_8994=m CONFIG_MSM_GCC_8994=y
NSSCC driver is needed to enable the ethernet interfaces and not necessary for the bootup of the SoC, hence build it as a module. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> --- Changes in V3: - No change arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)