Message ID | 20240131-ufs-phy-clock-v3-13-58a49d2f4605@linaro.org |
---|---|
State | Accepted |
Commit | dde771402292ea60f96bfbfae8b130556585ad76 |
Headers | show
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Tue, 30 Jan 2024 23:09:12 -0800 (PST) Received: from [127.0.1.1] ([103.28.246.26]) by smtp.gmail.com with ESMTPSA id lp17-20020a056a003d5100b006ddd182bf1csm9087956pfb.46.2024.01.30.23.09.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 23:09:12 -0800 (PST) From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Date: Wed, 31 Jan 2024 12:37:36 +0530 Subject: [PATCH v3 13/17] arm64: dts: qcom: sc8180x: Fix UFS PHY clocks Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240131-ufs-phy-clock-v3-13-58a49d2f4605@linaro.org> References: <20240131-ufs-phy-clock-v3-0-58a49d2f4605@linaro.org> In-Reply-To: <20240131-ufs-phy-clock-v3-0-58a49d2f4605@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org> Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, quic_cang@quicinc.com, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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Series |
[v3,01/17] dt-bindings: phy: qmp-ufs: Fix PHY clocks
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diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index c64625619a65..45d39762fb27 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -2140,9 +2140,11 @@ ufs_mem_phy: phy-wrapper@1d87000 { reg = <0 0x01d87000 0 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&gcc GCC_UFS_MEM_CLKREF_EN>; clock-names = "ref", - "ref_aux"; + "ref_aux", + "qref"; resets = <&ufs_mem_hc 0>; reset-names = "ufsphy";