| Message ID | 20240216-sm8550-msi-map-fix-v1-1-b66d83ce48b7@linaro.org |
|---|---|
| State | Accepted |
| Commit | dfc554d5217163f9d1c9d75d1380af1156df6eb3 |
| Headers | show |
| Series | arm64: dts: sm8650: Add msi-map-mask for PCIe nodes | expand |
On 16/02/2024 18:05, Manivannan Sadhasivam wrote: > "msi-map-mask" is a required property for all Qcom PCIe controllers as it > would allow all PCIe devices under a bus to share the same MSI identifier. > > Without this property, each device has to use a separate MSI identifier > which is not possible due to platform limitations. > > Currently, this is not an issue since only one device is connected to the > bus on boards making use of this SoC. > > Fixes: a33a532b3b1e ("arm64: dts: qcom: sm8650: Use GIC-ITS for PCIe0 and PCIe1") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi > index d488b3b3265e..12ba839f215e 100644 > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi > @@ -2277,6 +2277,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > /* Entries are reversed due to the unusual ITS DeviceID encoding */ > msi-map = <0x0 &gic_its 0x1401 0x1>, > <0x100 &gic_its 0x1400 0x1>; > + msi-map-mask = <0xff00>; > > linux,pci-domain = <0>; > num-lanes = <2>; > @@ -2404,6 +2405,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > /* Entries are reversed due to the unusual ITS DeviceID encoding */ > msi-map = <0x0 &gic_its 0x1481 0x1>, > <0x100 &gic_its 0x1480 0x1>; > + msi-map-mask = <0xff00>; > > linux,pci-domain = <1>; > num-lanes = <2>; > > --- > base-commit: d37e1e4c52bc60578969f391fb81f947c3e83118 > change-id: 20240216-sm8550-msi-map-fix-ab8fe5e24df1 > > Best regards, Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
On Fri, Feb 16, 2024 at 10:35:21PM +0530, Manivannan Sadhasivam wrote: > "msi-map-mask" is a required property for all Qcom PCIe controllers as it > would allow all PCIe devices under a bus to share the same MSI identifier. > > Without this property, each device has to use a separate MSI identifier > which is not possible due to platform limitations. > > Currently, this is not an issue since only one device is connected to the > bus on boards making use of this SoC. > > Fixes: a33a532b3b1e ("arm64: dts: qcom: sm8650: Use GIC-ITS for PCIe0 and PCIe1") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reported-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Johan
On Fri, 16 Feb 2024 22:35:21 +0530, Manivannan Sadhasivam wrote: > "msi-map-mask" is a required property for all Qcom PCIe controllers as it > would allow all PCIe devices under a bus to share the same MSI identifier. > > Without this property, each device has to use a separate MSI identifier > which is not possible due to platform limitations. > > Currently, this is not an issue since only one device is connected to the > bus on boards making use of this SoC. > > [...] Applied, thanks! [1/1] arm64: dts: sm8650: Add msi-map-mask for PCIe nodes commit: dfc554d5217163f9d1c9d75d1380af1156df6eb3 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index d488b3b3265e..12ba839f215e 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2277,6 +2277,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, /* Entries are reversed due to the unusual ITS DeviceID encoding */ msi-map = <0x0 &gic_its 0x1401 0x1>, <0x100 &gic_its 0x1400 0x1>; + msi-map-mask = <0xff00>; linux,pci-domain = <0>; num-lanes = <2>; @@ -2404,6 +2405,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, /* Entries are reversed due to the unusual ITS DeviceID encoding */ msi-map = <0x0 &gic_its 0x1481 0x1>, <0x100 &gic_its 0x1480 0x1>; + msi-map-mask = <0xff00>; linux,pci-domain = <1>; num-lanes = <2>;
"msi-map-mask" is a required property for all Qcom PCIe controllers as it would allow all PCIe devices under a bus to share the same MSI identifier. Without this property, each device has to use a separate MSI identifier which is not possible due to platform limitations. Currently, this is not an issue since only one device is connected to the bus on boards making use of this SoC. Fixes: a33a532b3b1e ("arm64: dts: qcom: sm8650: Use GIC-ITS for PCIe0 and PCIe1") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++ 1 file changed, 2 insertions(+) --- base-commit: d37e1e4c52bc60578969f391fb81f947c3e83118 change-id: 20240216-sm8550-msi-map-fix-ab8fe5e24df1 Best regards,