@@ -1095,8 +1095,11 @@ config ARCH_SNAPDRAGON
select OF_CONTROL
select OF_SEPARATE
select SMEM
select SPMI
+ select OF_BOARD
+ select SAVE_PREV_BL_FDT_ADDR
+ select LINUX_KERNEL_IMAGE_HEADER
imply CMD_DM
config ARCH_SOCFPGA
bool "Altera SOCFPGA family"
@@ -631,12 +631,13 @@ dtb-$(CONFIG_TARGET_SL28) += fsl-ls1028a-kontron-sl28.dtb \
fsl-ls1028a-kontron-sl28-var4.dtb \
dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb
-dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb
-dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb
-dtb-$(CONFIG_TARGET_STARQLTECHN) += starqltechn.dtb
-dtb-$(CONFIG_TARGET_QCS404EVB) += qcs404-evb.dtb
+dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb \
+ dragonboard820c.dtb \
+ dragonboard845c.dtb \
+ starqltechn.dtb \
+ qcs404-evb.dtb
dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb
dtb-$(CONFIG_STM32F4) += stm32f429-disco.dtb \
@@ -2,8 +2,11 @@ if ARCH_SNAPDRAGON
config SYS_SOC
default "snapdragon"
+config SYS_VENDOR
+ default "qualcomm"
+
config SYS_MALLOC_F_LEN
default 0x2000
config SPL_SYS_MALLOC_F
@@ -11,92 +14,25 @@ config SPL_SYS_MALLOC_F
config SPL_SYS_MALLOC_F_LEN
default 0x2000
-config SDM845
- bool "Qualcomm Snapdragon 845 SoC"
- select LINUX_KERNEL_IMAGE_HEADER
- imply CLK_QCOM_SDM845
- imply PINCTRL_QCOM_SDM845
- imply BUTTON_QCOM_PMIC
-
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
default 0x80000000
-choice
- prompt "Snapdragon board select"
-
-config TARGET_DRAGONBOARD410C
- bool "96Boards Dragonboard 410C"
- select BOARD_LATE_INIT
- select ENABLE_ARM_SOC_BOOT0_HOOK
- imply CLK_QCOM_APQ8016
- imply PINCTRL_QCOM_APQ8016
- imply BUTTON_QCOM_PMIC
+config SYS_BOARD
+ string "Qualcomm custom board"
help
- Support for 96Boards Dragonboard 410C. This board complies with
- 96Board Open Platform Specifications. Features:
- - Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306)
- - 1GiB RAM
- - 8GiB eMMC, uSD slot
- - WiFi, Bluetooth and GPS module
- - 2x Host, 1x Device USB port
- - HDMI
- - 20-pin low speed and 40-pin high speed expanders, 4 LED, 3 buttons
+ The Dragonboard 410c and 820c have additional board init
+ code that isn't shared with other Qualcomm boards.
+ Based on this option board/qualcomm/<CONFIG_SYS_BOARD> will
+ be used.
-config TARGET_DRAGONBOARD820C
- bool "96Boards Dragonboard 820C"
- select LINUX_KERNEL_IMAGE_HEADER
- imply CLK_QCOM_APQ8096
- imply PINCTRL_QCOM_APQ8096
- imply BUTTON_QCOM_PMIC
+config SYS_CONFIG_NAME
+ string "Board configuration name"
+ default SYS_BOARD if SYS_BOARD != ""
+ default "qcom"
help
- Support for 96Boards Dragonboard 820C. This board complies with
- 96Board Open Platform Specifications. Features:
- - Qualcomm Snapdragon 820C SoC - APQ8096 (4xKyro CPU)
- - 3GiB RAM
- - 32GiB UFS drive
-
-config TARGET_DRAGONBOARD845C
- bool "96Boards Dragonboard 845C"
- help
- Support for 96Boards Dragonboard 845C aka Robotics RB3 Development
- Platform. This board complies with 96Boards Open Platform
- Specifications. Features:
- - Qualcomm Snapdragon SDA845 SoC
- - 4GiB RAM
- - 64GiB UFS drive
- select MISC_INIT_R
- select SDM845
-
-config TARGET_STARQLTECHN
- bool "Samsung S9 SM-G9600(starqltechn)"
- help
- Support for Samsung S9 SM-G9600(starqltechn) board.
- Features:
- - Qualcomm Snapdragon SDM845 SoC
- - 4GiB RAM
- - 64GiB UFS drive
- select MISC_INIT_R
- select SDM845
-
-config TARGET_QCS404EVB
- bool "Qualcomm Technologies, Inc. QCS404 EVB"
- select LINUX_KERNEL_IMAGE_HEADER
- imply CLK_QCOM_QCS404
- imply PINCTRL_QCOM_QCS404
- help
- Support for Qualcomm Technologies, Inc. QCS404 evaluation board.
- Features:
- - Qualcomm Snapdragon QCS404 SoC
- - 1GiB RAM
- - 8GiB eMMC, uSD slot
-
-endchoice
-
-source "board/qualcomm/dragonboard410c/Kconfig"
-source "board/qualcomm/dragonboard820c/Kconfig"
-source "board/qualcomm/dragonboard845c/Kconfig"
-source "board/samsung/starqltechn/Kconfig"
-source "board/qualcomm/qcs404-evb/Kconfig"
+ This option contains information about board configuration name.
+ Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
+ will be used for board configuration.
endif
@@ -1,9 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
-obj-$(CONFIG_SDM845) += sysmap-sdm845.o
-obj-$(CONFIG_SDM845) += init_sdm845.o
-obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o
-obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
-obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o
+obj-y += board.o
new file mode 100644
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Common initialisation for Qualcomm Snapdragon boards.
+ *
+ * Copyright (c) 2024 Linaro Ltd.
+ * Author: Caleb Connolly <caleb.connolly@linaro.org>
+ */
+
+#include "time.h"
+#include <asm/armv8/mmu.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <asm/system.h>
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+#include <dm/uclass-internal.h>
+#include <dm/read.h>
+#include <env.h>
+#include <init.h>
+#include <linux/arm-smccc.h>
+#include <linux/bug.h>
+#include <linux/psci.h>
+#include <linux/sizes.h>
+#include <malloc.h>
+#include <usb.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct mm_region rbx_mem_map[CONFIG_NR_DRAM_BANKS + 2] = { { 0 } };
+
+struct mm_region *mem_map = rbx_mem_map;
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+static int ddr_bank_cmp(const void *v1, const void *v2)
+{
+ const struct {
+ phys_addr_t start;
+ phys_size_t size;
+ } *res1 = v1, *res2 = v2;
+
+ if (!res1->size)
+ return 1;
+ if (!res2->size)
+ return -1;
+
+ return (res1->start >> 24) - (res2->start >> 24);
+}
+
+int dram_init_banksize(void)
+{
+ int ret;
+
+ ret = fdtdec_setup_memory_banksize();
+ if (ret < 0)
+ return ret;
+
+ if (CONFIG_NR_DRAM_BANKS < 2)
+ return 0;
+
+ /* Sort our RAM banks -_- */
+ qsort(gd->bd->bi_dram, CONFIG_NR_DRAM_BANKS, sizeof(gd->bd->bi_dram[0]), ddr_bank_cmp);
+
+ return 0;
+}
+
+static void show_psci_version(void)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
+
+ debug("PSCI: v%ld.%ld\n",
+ PSCI_VERSION_MAJOR(res.a0),
+ PSCI_VERSION_MINOR(res.a0));
+}
+
+void *board_fdt_blob_setup(int *err)
+{
+ phys_addr_t fdt;
+ /* Return DTB pointer passed by ABL */
+ *err = 0;
+ fdt = get_prev_bl_fdt_addr();
+
+ /*
+ * If we bail then the board will simply not boot, instead let's
+ * try and use the FDT built into U-Boot if there is one...
+ * This avoids having a hard dependency on the previous stage bootloader
+ */
+ if (IS_ENABLED(CONFIG_OF_SEPARATE) && (!fdt || fdt != ALIGN(fdt, SZ_4K))) {
+ debug("%s: Using built in FDT, bootloader gave us %#llx\n", __func__, fdt);
+ return (void *)gd->fdt_blob;
+ }
+
+ return (void *)fdt;
+}
+
+void reset_cpu(void)
+{
+ psci_system_reset();
+}
+
+/*
+ * Some Qualcomm boards require GPIO configuration when switching USB modes.
+ * Support setting this configuration via pinctrl state.
+ */
+int board_usb_init(int index, enum usb_init_type init)
+{
+ struct udevice *usb;
+ int ret = 0;
+
+ /* USB device */
+ ret = uclass_find_device_by_seq(UCLASS_USB, index, &usb);
+ if (ret) {
+ printf("Cannot find USB device\n");
+ return ret;
+ }
+
+ ret = dev_read_stringlist_search(usb, "pinctrl-names",
+ "device");
+ /* No "device" pinctrl state, so just bail */
+ if (ret < 0)
+ return 0;
+
+ /* Select "default" or "device" pinctrl */
+ switch (init) {
+ case USB_INIT_HOST:
+ pinctrl_select_state(usb, "default");
+ break;
+ case USB_INIT_DEVICE:
+ pinctrl_select_state(usb, "device");
+ break;
+ default:
+ debug("Unknown usb_init_type %d\n", init);
+ break;
+ }
+
+ return 0;
+}
+
+/*
+ * Some boards still need board specific init code, they can implement that by
+ * overriding this function.
+ *
+ * FIXME: get rid of board specific init code
+ */
+void __weak qcom_board_init(void)
+{
+}
+
+int board_init(void)
+{
+ show_psci_version();
+ qcom_board_init();
+ return 0;
+}
+
+static void build_mem_map(void)
+{
+ int i;
+
+ /*
+ * Ensure the peripheral block is sized to correctly cover the address range
+ * up to the first memory bank.
+ * Don't map the first page to ensure that we actually trigger an abort on a
+ * null pointer access rather than just hanging.
+ * FIXME: we should probably split this into more precise regions
+ */
+ mem_map[0].phys = 0x1000;
+ mem_map[0].virt = mem_map[0].phys;
+ mem_map[0].size = gd->bd->bi_dram[0].start - mem_map[0].phys;
+ mem_map[0].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN;
+
+ debug("Configured memory map:\n");
+ debug(" 0x%016llx - 0x%016llx: Peripheral block\n",
+ mem_map[0].phys, mem_map[0].phys + mem_map[0].size);
+
+ /*
+ * Now add memory map entries for each DRAM bank, ensuring we don't
+ * overwrite the list terminator
+ */
+ for (i = 0; i < ARRAY_SIZE(rbx_mem_map) - 2 && gd->bd->bi_dram[i].size; i++) {
+ if (i == ARRAY_SIZE(rbx_mem_map) - 1) {
+ log_warning("Too many DRAM banks!\n");
+ break;
+ }
+ mem_map[i + 1].phys = gd->bd->bi_dram[i].start;
+ mem_map[i + 1].virt = mem_map[i + 1].phys;
+ mem_map[i + 1].size = gd->bd->bi_dram[i].size;
+ mem_map[i + 1].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE;
+
+ debug(" 0x%016llx - 0x%016llx: DDR bank %d\n",
+ mem_map[i + 1].phys, mem_map[i + 1].phys + mem_map[i + 1].size, i);
+ }
+}
+
+u64 get_page_table_size(void)
+{
+ return SZ_64K;
+}
+
+void enable_caches(void)
+{
+ build_mem_map();
+
+ icache_enable();
+ dcache_enable();
+}
deleted file mode 100644
@@ -1,73 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Common init part for boards based on SDM845
- *
- * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
- */
-
-#include <button.h>
-#include <init.h>
-#include <env.h>
-#include <common.h>
-#include <asm/system.h>
-#include <asm/gpio.h>
-#include <dm.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int dram_init(void)
-{
- return fdtdec_setup_mem_size_base();
-}
-
-void reset_cpu(void)
-{
- psci_system_reset();
-}
-
-__weak int board_init(void)
-{
- return 0;
-}
-
-/* Check for vol- and power buttons */
-__weak int misc_init_r(void)
-{
- struct udevice *btn;
- int ret;
- enum button_state_t state;
-
- ret = button_get_by_label("pwrkey", &btn);
- if (ret < 0) {
- printf("Couldn't find power button!\n");
- return ret;
- }
-
- state = button_get_state(btn);
- if (state == BUTTON_ON) {
- env_set("key_power", "1");
- printf("Power button pressed\n");
- } else {
- env_set("key_power", "0");
- }
-
- /*
- * search for kaslr address, set by primary bootloader by searching first
- * 0x100 relocated bytes at u-boot's initial load address range
- */
- uintptr_t start = gd->ram_base;
- uintptr_t end = start + 0x800000;
- u8 *addr = (u8 *)start;
- phys_addr_t *relocaddr = (phys_addr_t *)gd->relocaddr;
- u32 block_size = 0x1000;
-
- while (memcmp(addr, relocaddr, 0x100) && (uintptr_t)addr < end)
- addr += block_size;
-
- if ((uintptr_t)addr >= end)
- printf("KASLR not found in range 0x%lx - 0x%lx", start, end);
- else
- env_set_addr("KASLR", addr);
-
- return 0;
-}
deleted file mode 100644
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm APQ8016 memory map
- *
- * (C) Copyright 2016 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
- */
-
-#include <common.h>
-#include <asm/armv8/mmu.h>
-
-static struct mm_region apq8016_mem_map[] = {
- {
- .virt = 0x0UL, /* Peripheral block */
- .phys = 0x0UL, /* Peripheral block */
- .size = 0x8000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL, /* DDR */
- .phys = 0x80000000UL, /* DDR */
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = apq8016_mem_map;
deleted file mode 100644
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm APQ8096 memory map
- *
- * (C) Copyright 2017 Jorge Ramirez Ortiz <jorge.ramirez-ortiz@linaro.org>
- */
-
-#include <common.h>
-#include <asm/armv8/mmu.h>
-
-static struct mm_region apq8096_mem_map[] = {
- {
- .virt = 0x0UL, /* Peripheral block */
- .phys = 0x0UL, /* Peripheral block */
- .size = 0x10000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL, /* DDR */
- .phys = 0x80000000UL, /* DDR */
- .size = 0xC0000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = apq8096_mem_map;
deleted file mode 100644
@@ -1,43 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm QCS404 memory map
- *
- * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
- */
-
-#include <common.h>
-#include <asm/armv8/mmu.h>
-
-static struct mm_region qcs404_mem_map[] = {
- {
- .virt = 0x0UL, /* Peripheral block */
- .phys = 0x0UL, /* Peripheral block */
- .size = 0x8000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL, /* DDR */
- .phys = 0x80000000UL, /* DDR */
- .size = 0x05900000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x89600000UL, /* DDR */
- .phys = 0x89600000UL, /* DDR */
- .size = 0x162000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa0000000UL, /* DDR */
- .phys = 0xa0000000UL, /* DDR */
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = qcs404_mem_map;
deleted file mode 100644
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm SDM845 memory map
- *
- * (C) Copyright 2021 Dzmitry Sankouski <dsankousk@gmail.com>
- */
-
-#include <common.h>
-#include <asm/armv8/mmu.h>
-
-static struct mm_region sdm845_mem_map[] = {
- {
- .virt = 0x0UL, /* Peripheral block */
- .phys = 0x0UL, /* Peripheral block */
- .size = 0x10000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL, /* DDR */
- .phys = 0x80000000UL, /* DDR */
- .size = 0x200000000UL, /* 8GiB - maximum allowed memory */
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = sdm845_mem_map;
deleted file mode 100644
@@ -1,15 +0,0 @@
-if TARGET_DRAGONBOARD410C
-
-config SYS_BOARD
- default "dragonboard410c"
-
-config SYS_VENDOR
- default "qualcomm"
-
-config SYS_SOC
- default "apq8016"
-
-config SYS_CONFIG_NAME
- default "dragonboard410c"
-
-endif
@@ -22,39 +22,8 @@
#include <linux/delay.h>
DECLARE_GLOBAL_DATA_PTR;
-#define USB_HUB_RESET_GPIO 2
-#define USB_SW_SELECT_GPIO 3
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- struct udevice *usb;
- int ret = 0;
-
- /* USB device */
- ret = device_find_global_by_ofnode(ofnode_path("/soc/usb"), &usb);
- if (ret) {
- printf("Cannot find USB device\n");
- return ret;
- }
-
- /* Select "default" or "device" pinctrl */
- switch (init) {
- case USB_INIT_HOST:
- pinctrl_select_state(usb, "default");
- break;
- case USB_INIT_DEVICE:
- pinctrl_select_state(usb, "device");
- break;
- default:
- debug("Unknown usb_init_type %d\n", init);
- break;
- }
-
- return 0;
-}
-
/* UNSTUFF_BITS macro taken from Linux Kernel: drivers/mmc/core/sd.c */
#define UNSTUFF_BITS(resp, start, size) \
({ \
const int __size = size; \
@@ -118,13 +87,8 @@ int misc_init_r(void)
return 0;
}
-int board_init(void)
-{
- return 0;
-}
-
int board_late_init(void)
{
char serial[16];
@@ -165,9 +129,4 @@ int ft_board_setup(void *blob, struct bd_info *bd)
do_fixup_by_compat(blob, "qcom,wcnss-bt",
"local-bd-address", mac, ARP_HLEN, 1);
return 0;
}
-
-void reset_cpu(void)
-{
- psci_system_reset();
-}
deleted file mode 100644
@@ -1,15 +0,0 @@
-if TARGET_DRAGONBOARD820C
-
-config SYS_BOARD
- default "dragonboard820c"
-
-config SYS_VENDOR
- default "qualcomm"
-
-config SYS_SOC
- default "apq8096"
-
-config SYS_CONFIG_NAME
- default "dragonboard820c"
-
-endif
@@ -26,26 +26,8 @@
#define SDC1_HDRV_PULL_CTL_REG (TLMM_BASE_ADDR + 0x0012D000)
DECLARE_GLOBAL_DATA_PTR;
-int dram_init(void)
-{
- gd->ram_size = PHYS_SDRAM_SIZE;
-
- return 0;
-}
-
-int dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-
- return 0;
-}
-
static void sdhci_power_init(void)
{
const u32 TLMM_PULL_MASK = 0x3;
const u32 TLMM_HDRV_MASK = 0x7;
@@ -112,30 +94,11 @@ static void sdhci_power_init(void)
rclk[i].mask << rclk[i].bit,
rclk[i].val << rclk[i].bit);
}
-static void show_psci_version(void)
-{
- struct arm_smccc_res res;
-
- arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
-
- printf("PSCI: v%ld.%ld\n",
- PSCI_VERSION_MAJOR(res.a0),
- PSCI_VERSION_MINOR(res.a0));
-}
-
-int board_init(void)
+void qcom_board_init(void)
{
sdhci_power_init();
- show_psci_version();
-
- return 0;
-}
-
-void reset_cpu(void)
-{
- psci_system_reset();
}
/* Check for vol- button - if pressed - stop autoboot */
int misc_init_r(void)
deleted file mode 100644
@@ -1,12 +0,0 @@
-if TARGET_DRAGONBOARD845C
-
-config SYS_BOARD
- default "dragonboard845c"
-
-config SYS_CONFIG_NAME
- default "dragonboard845c"
-
-config SYS_VENDOR
- default "qualcomm"
-
-endif
deleted file mode 100644
@@ -1,15 +0,0 @@
-if TARGET_QCS404EVB
-
-config SYS_BOARD
- default "qcs404-evb"
-
-config SYS_VENDOR
- default "qualcomm"
-
-config SYS_SOC
- default "qcs404"
-
-config SYS_CONFIG_NAME
- default "qcs404-evb"
-
-endif
@@ -13,18 +13,12 @@
#include <asm/cache.h>
#include <asm/gpio.h>
#include <asm/global_data.h>
#include <fdt_support.h>
-#include <asm/arch/dram.h>
DECLARE_GLOBAL_DATA_PTR;
-int dram_init(void)
-{
- return fdtdec_setup_mem_size_base();
-}
-
-int board_init(void)
+void qcom_board_init(void)
{
struct udevice *pmic_gpio;
struct gpio_desc usb_vbus_boost_pin;
int ret, node;
@@ -33,30 +27,23 @@ int board_init(void)
"pms405_gpios@c000",
&pmic_gpio);
if (ret < 0) {
printf("Failed to find pms405_gpios@c000 node.\n");
- return ret;
+ return;
}
node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pmic_gpio),
"usb_vbus_boost_pin");
if (node < 0) {
printf("Failed to find usb_hub_reset_pm dt node.\n");
- return node;
+ return;
}
ret = gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
&usb_vbus_boost_pin, 0);
if (ret < 0) {
printf("Failed to request usb_hub_reset_pm gpio.\n");
- return ret;
+ return;
}
dm_gpio_set_dir_flags(&usb_vbus_boost_pin,
GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
-
- return 0;
-}
-
-void reset_cpu(void)
-{
- psci_system_reset();
}
@@ -1,10 +1,11 @@
CONFIG_ARM=y
+CONFIG_SYS_BOARD="dragonboard410c"
CONFIG_COUNTER_FREQUENCY=19000000
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
CONFIG_ARCH_SNAPDRAGON=y
CONFIG_TEXT_BASE=0x8f600000
CONFIG_SYS_MALLOC_LEN=0x802000
-CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
@@ -37,9 +38,11 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
+CONFIG_BUTTON_QCOM_PMIC=y
CONFIG_CLK=y
+CONFIG_CLK_QCOM_APQ8016=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x91000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
@@ -51,8 +54,9 @@ CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_MSM=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
+CONFIG_PINCTRL_QCOM_APQ8016=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_QCOM=y
CONFIG_MSM_SERIAL=y
CONFIG_SPMI_MSM=y
@@ -1,15 +1,14 @@
CONFIG_ARM=y
+CONFIG_SYS_BOARD="dragonboard820c"
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_ARCH_SNAPDRAGON=y
CONFIG_TEXT_BASE=0x80080000
CONFIG_SYS_MALLOC_LEN=0x804000
-CONFIG_NR_DRAM_BANKS=2
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c"
-CONFIG_TARGET_DRAGONBOARD820C=y
CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C"
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_BOOTARGS=y
@@ -34,14 +33,17 @@ CONFIG_CMD_PMIC=y
CONFIG_ENV_IS_IN_EXT4=y
CONFIG_ENV_EXT4_INTERFACE="mmc"
CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_BUTTON_QCOM_PMIC=y
CONFIG_CLK=y
+CONFIG_CLK_QCOM_APQ8096=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_MSM=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
+CONFIG_PINCTRL_QCOM_APQ8096=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_QCOM=y
CONFIG_MSM_SERIAL=y
CONFIG_SPMI_MSM=y
deleted file mode 100644
@@ -1,29 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_COUNTER_FREQUENCY=19000000
-CONFIG_POSITION_INDEPENDENT=y
-CONFIG_ARCH_SNAPDRAGON=y
-CONFIG_DEFAULT_DEVICE_TREE="dragonboard845c"
-CONFIG_TARGET_DRAGONBOARD845C=y
-CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 845C"
-CONFIG_SYS_LOAD_ADDR=0x80000000
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_BOOTDELAY=5
-CONFIG_SAVE_PREV_BL_FDT_ADDR=y
-CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
-CONFIG_SYS_CBSIZE=512
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_CMD_GPIO=y
-# CONFIG_NET is not set
-CONFIG_CLK=y
-CONFIG_MSM_GPIO=y
-CONFIG_QCOM_PMIC_GPIO=y
-CONFIG_PINCTRL=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_QCOM=y
-CONFIG_MSM_GENI_SERIAL=y
-CONFIG_SPMI_MSM=y
-CONFIG_LMB_MAX_REGIONS=64
new file mode 100644
@@ -0,0 +1,67 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_SNAPDRAGON=y
+CONFIG_DEFAULT_DEVICE_TREE="dragonboard845c"
+CONFIG_SYS_LOAD_ADDR=0x0
+CONFIG_BUTTON_CMD=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTSTD_FULL=y
+# CONFIG_BOOTMETH_VBE is not set
+CONFIG_BOOTDELAY=1
+CONFIG_USE_PREBOOT=y
+CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_LOG_MAX_LEVEL=9
+CONFIG_LOG_DEFAULT_LEVEL=4
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_UFS=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CAT=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_LOG=y
+# CONFIG_NET is not set
+CONFIG_BUTTON_QCOM_PMIC=y
+CONFIG_CLK=y
+CONFIG_CLK_QCOM_QCS404=y
+CONFIG_CLK_QCOM_SDM845=y
+CONFIG_MSM_GPIO=y
+CONFIG_QCOM_PMIC_GPIO=y
+CONFIG_DM_KEYBOARD=y
+CONFIG_BUTTON_KEYBOARD=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_MSM=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_QCOM_QCS404=y
+CONFIG_PINCTRL_QCOM_SDM845=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_QCOM=y
+CONFIG_SCSI=y
+CONFIG_MSM_SERIAL=y
+CONFIG_MSM_GENI_SERIAL=y
+CONFIG_SPMI_MSM=y
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_UFS=y
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_8X16 is not set
+CONFIG_VIDEO_FONT_16X32=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_NO_FB_CLEAR=y
+CONFIG_VIDEO_SIMPLE=y
+CONFIG_HEXDUMP=y
+# CONFIG_GENERATE_SMBIOS_TABLE is not set
+CONFIG_LMB_MAX_REGIONS=64
@@ -1,12 +1,11 @@
CONFIG_ARM=y
+CONFIG_SYS_BOARD="qcs404-evb"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_SNAPDRAGON=y
CONFIG_DEFAULT_DEVICE_TREE="qcs404-evb"
-CONFIG_DM_RESET=y
-CONFIG_TARGET_QCS404EVB=y
CONFIG_IDENT_STRING="\nQualcomm QCS404-EVB"
CONFIG_SYS_LOAD_ADDR=0x80000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -30,8 +29,9 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_NET is not set
CONFIG_CLK=y
+CONFIG_CLK_QCOM_QCS404=y
CONFIG_MSM_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_MISC=y
CONFIG_MMC_HS400_SUPPORT=y
@@ -41,8 +41,9 @@ CONFIG_MMC_SDHCI_MSM=y
CONFIG_PHY=y
CONFIG_PHY_QCOM_USB_HS_28NM=y
CONFIG_PHY_QCOM_USB_SS=y
CONFIG_PINCTRL=y
+CONFIG_PINCTRL_QCOM_QCS404=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_QCOM=y
CONFIG_MSM_SERIAL=y
CONFIG_SPMI_MSM=y
deleted file mode 100644
@@ -1,41 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_COUNTER_FREQUENCY=19000000
-CONFIG_POSITION_INDEPENDENT=y
-CONFIG_ARCH_SNAPDRAGON=y
-CONFIG_DEFAULT_DEVICE_TREE="starqltechn"
-CONFIG_TARGET_STARQLTECHN=y
-CONFIG_IDENT_STRING="\nSamsung S9 SM-G9600"
-CONFIG_SYS_LOAD_ADDR=0x80000000
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_BOOTDELAY=0
-CONFIG_SAVE_PREV_BL_FDT_ADDR=y
-CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_CMD_BOOTMENU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_BMP=y
-# CONFIG_NET is not set
-CONFIG_BUTTON=y
-CONFIG_CLK=y
-CONFIG_MSM_GPIO=y
-CONFIG_QCOM_PMIC_GPIO=y
-CONFIG_DM_KEYBOARD=y
-CONFIG_BUTTON_KEYBOARD=y
-CONFIG_PINCTRL=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_QCOM=y
-CONFIG_MSM_GENI_SERIAL=y
-CONFIG_SPMI_MSM=y
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_FONT_8X16 is not set
-CONFIG_VIDEO_FONT_16X32=y
-CONFIG_SYS_WHITE_ON_BLACK=y
-CONFIG_VIDEO_SIMPLE=y
-CONFIG_VIDEO_DT_SIMPLEFB=y
-CONFIG_LMB_MAX_REGIONS=64
deleted file mode 100644
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration file for Dragonboard 845c, based on Qualcomm SDA845 chip
- *
- * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
- */
-
-#ifndef __CONFIGS_SDM845_H
-#define __CONFIGS_SDM845_H
-
-#include <linux/sizes.h>
-
-#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
-
-#define CFG_EXTRA_ENV_SETTINGS \
- "bootm_size=0x5000000\0" \
- "bootm_low=0x80000000\0" \
- "bootcmd=bootm $prevbl_initrd_start_addr\0"
-
-#endif
new file mode 100644
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration file for Qualcomm Snapdragon boards
+ *
+ * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
+ * (C) Copyright 2023 Linaro Ltd.
+ */
+
+#ifndef __CONFIGS_SNAPDRAGON_H
+#define __CONFIGS_SNAPDRAGON_H
+
+#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
+
+/* Load addressed are calculated during board_late_init(). See arm/mach-snapdragon/board.c */
+#define CFG_EXTRA_ENV_SETTINGS \
+ "stdin=serial,button-kbd\0" \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0" \
+ "bootcmd=bootm $prevbl_initrd_start_addr\0"
+
+#endif
deleted file mode 100644
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration file for QCS404 evaluation board
- *
- * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
- */
-
-#ifndef __CONFIGS_QCS404EVB_H
-#define __CONFIGS_QCS404EVB_H
-
-#include <linux/sizes.h>
-
-#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
-
-#define CFG_EXTRA_ENV_SETTINGS \
- "bootm_size=0x5000000\0" \
- "bootm_low=0x80000000\0" \
- "bootcmd=bootm $prevbl_initrd_start_addr\0"
-
-#endif
deleted file mode 100644
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration file for boards, based on Qualcomm SDM845 chip
- *
- * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
- */
-
-#ifndef __CONFIGS_SDM845_H
-#define __CONFIGS_SDM845_H
-
-#include <linux/sizes.h>
-
-#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
-
-#define CFG_EXTRA_ENV_SETTINGS \
- "bootm_size=0x4000000\0" \
- "bootm_low=0x80000000\0" \
- "stdin=serial,button-kbd\0" \
- "stdout=serial,vidconsole\0" \
- "stderr=serial,vidconsole\0" \
- "preboot=source $prevbl_initrd_start_addr:prebootscript\0" \
- "bootcmd=source $prevbl_initrd_start_addr:bootscript\0"
-
-/* Size of malloc() pool */
-
-#endif