| Message ID | 1476324020-57155-3-git-send-email-heyi.guo@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
On Thu, Oct 13, 2016 at 10:00:12AM +0800, Heyi Guo wrote: > Lane reversal has been done by chip and it is unnecessary for software > to do that. Can you clarify this? This can currently be read as there having been a change between different hardware revisions, and I do not think this is the case. If that is the case, then a hardware revision check and a conditional call should be added. / Leif > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: hensonwang <wanghuiqiang@huawei.com> > Signed-off-by: Heyi Guo <heyi.guo@linaro.org> > --- > Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c b/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c > index d2928ee..a8dd9df 100755 > --- a/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c > +++ b/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c > @@ -990,7 +990,6 @@ PciePortInit ( > (VOID)PciePcsInit(soctype, HostBridgeNum, PortIndex); > > (VOID)PcieModeSet(soctype, HostBridgeNum, PortIndex,PcieCfg->PortInfo.PortType); > - (VOID)PcieLaneReversalSet(soctype, HostBridgeNum, PortIndex); > (VOID)PcieSpdSet(soctype, HostBridgeNum, PortIndex, 3); > (VOID)PciePortNumSet(soctype, HostBridgeNum, PortIndex, 0); > /* setup root complex */ > -- > 1.9.1 >
在 10/13/2016 5:32 PM, Leif Lindholm 写道: > On Thu, Oct 13, 2016 at 10:00:12AM +0800, Heyi Guo wrote: >> Lane reversal has been done by chip and it is unnecessary for software >> to do that. > Can you clarify this? > This can currently be read as there having been a change between > different hardware revisions, and I do not think this is the case. > > If that is the case, then a hardware revision check and a conditional > call should be added. No. Lane reversal is the default setting of chip, and we made a mistake to repeat the setting in software. Now we are just removing the duplication in software. I will change the commit message. Thanks. Heyi > > / > Leif > >> Contributed-under: TianoCore Contribution Agreement 1.0 >> Signed-off-by: hensonwang <wanghuiqiang@huawei.com> >> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> >> --- >> Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 1 - >> 1 file changed, 1 deletion(-) >> >> diff --git a/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c b/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c >> index d2928ee..a8dd9df 100755 >> --- a/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c >> +++ b/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c >> @@ -990,7 +990,6 @@ PciePortInit ( >> (VOID)PciePcsInit(soctype, HostBridgeNum, PortIndex); >> >> (VOID)PcieModeSet(soctype, HostBridgeNum, PortIndex,PcieCfg->PortInfo.PortType); >> - (VOID)PcieLaneReversalSet(soctype, HostBridgeNum, PortIndex); >> (VOID)PcieSpdSet(soctype, HostBridgeNum, PortIndex, 3); >> (VOID)PciePortNumSet(soctype, HostBridgeNum, PortIndex, 0); >> /* setup root complex */ >> -- >> 1.9.1 >>
diff --git a/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c b/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c index d2928ee..a8dd9df 100755 --- a/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c +++ b/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c @@ -990,7 +990,6 @@ PciePortInit ( (VOID)PciePcsInit(soctype, HostBridgeNum, PortIndex); (VOID)PcieModeSet(soctype, HostBridgeNum, PortIndex,PcieCfg->PortInfo.PortType); - (VOID)PcieLaneReversalSet(soctype, HostBridgeNum, PortIndex); (VOID)PcieSpdSet(soctype, HostBridgeNum, PortIndex, 3); (VOID)PciePortNumSet(soctype, HostBridgeNum, PortIndex, 0); /* setup root complex */