| Message ID | ZeWEqGVibkMg2APi@ns.kevlo.org |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] wifi: ath11k: adjust a comment to reflect reality | expand |
On 3/4/2024 12:22 AM, Kevin Lo wrote: > On QCA6390/QCN9074/WCN6855, MHISTATUS may still have SYSERR bit set > after SOC_GLOBAL_RESET. > > changes for v2: > - update comment about resetting MHICTRL to clear SYSERR for future reference the version log should not be part of the commit text > > Signed-off-by: Kevin Lo <kevlo@kevlo.org> > --- the version log goes here, after the --- ("after the cut") but no need to send another version -- Kalle can fix this when he pulls into the pending branch. Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
On 3/6/2024 1:14 AM, Kalle Valo wrote: > Kevin Lo <kevlo@kevlo.org> writes: > >> On QCA6390/QCN9074/WCN6855, MHISTATUS may still have SYSERR bit set >> after SOC_GLOBAL_RESET. >> >> changes for v2: >> - update comment about resetting MHICTRL to clear SYSERR >> >> Signed-off-by: Kevin Lo <kevlo@kevlo.org> > > This didn't apply and I manually edited the patch. I also removed the > changelog from the commit message, please check my changes: > > https://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git/commit/?h=pending&id=709cd1c88a11bc1969cf573575b0a2027e720146 > LGTM
Kevin Lo <kevlo@kevlo.org> wrote: > On QCA6390/QCN9074/WCN6855, MHISTATUS may still have SYSERR bit set > after SOC_GLOBAL_RESET. > > Signed-off-by: Kevin Lo <kevlo@kevlo.org> > Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com> > Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Patch applied to ath-next branch of ath.git, thanks. a368b0a9854e wifi: ath11k: adjust a comment to reflect reality
--- a/drivers/net/wireless/ath/ath11k/mhi.c +++ b/drivers/net/wireless/ath/ath11k/mhi.c @@ -158,9 +158,8 @@ void ath11k_mhi_set_mhictrl_reset(struct ath11k_base *ab) ath11k_dbg(ab, ATH11K_DBG_PCI, "mhistatus 0x%x\n", val); - /* Observed on QCA6390 that after SOC_GLOBAL_RESET, MHISTATUS - * has SYSERR bit set and thus need to set MHICTRL_RESET - * to clear SYSERR. + /* After SOC_GLOBAL_RESET, MHISTATUS may still have SYSERR bit set + * and thus need to set MHICTRL_RESET to clear SYSERR. */ ath11k_pcic_write32(ab, MHICTRL, MHICTRL_RESET_MASK);
On QCA6390/QCN9074/WCN6855, MHISTATUS may still have SYSERR bit set after SOC_GLOBAL_RESET. changes for v2: - update comment about resetting MHICTRL to clear SYSERR Signed-off-by: Kevin Lo <kevlo@kevlo.org> --- diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c index fb4ecf9a103e..956fff0d4962 100644