| Message ID | 20240306140306.876188-3-amadeus@jmu.edu.cn |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: qcom: ipq6018: rework CPU Frequency | expand |
On Wed, 6 Mar 2024 at 16:04, Chukun Pan <amadeus@jmu.edu.cn> wrote: > > The IPQ6005 and some IPQ6000 SoCs (with PMIC) have CPU > frequencies up to 1.5GHz, so add this frequency. After this patch non-PMIC IPQ6000 boardss are broken until patch3 is applied. Please change the order of these patches. > > Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> > --- > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > index 7fdb119083a2..064b5706a289 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > @@ -140,6 +140,13 @@ opp-1440000000 { > clock-latency-ns = <200000>; > }; > > + opp-1512000000 { > + opp-hz = /bits/ 64 <1512000000>; > + opp-microvolt = <937500>; > + opp-supported-hw = <0x2>; > + clock-latency-ns = <200000>; > + }; > + > opp-1608000000 { > opp-hz = /bits/ 64 <1608000000>; > opp-microvolt = <987500>; > -- > 2.25.1 > >
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 7fdb119083a2..064b5706a289 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -140,6 +140,13 @@ opp-1440000000 { clock-latency-ns = <200000>; }; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <937500>; + opp-supported-hw = <0x2>; + clock-latency-ns = <200000>; + }; + opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <987500>;
The IPQ6005 and some IPQ6000 SoCs (with PMIC) have CPU frequencies up to 1.5GHz, so add this frequency. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)