diff mbox series

[01/25] clk: meson: a1: restrict an amount of 'hifi_pll' params

Message ID 20240314232201.2102178-2-jan.dakinevich@salutedevices.com
State New
Headers show
Series Introduce support of audio for Amlogic A1 SoC family | expand

Commit Message

Jan Dakinevich March 14, 2024, 11:21 p.m. UTC 
Existing values were insufficient to produce accurate clock for audio
devices. New values are safe and most suitable to produce 48000Hz sample
rate.

Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com>
---
 drivers/clk/meson/a1-pll.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/clk/meson/a1-pll.c b/drivers/clk/meson/a1-pll.c
index 4325e8a6a3ef..00e06d03445b 100644
--- a/drivers/clk/meson/a1-pll.c
+++ b/drivers/clk/meson/a1-pll.c
@@ -74,9 +74,9 @@  static struct clk_regmap fixed_pll = {
 	},
 };
 
-static const struct pll_mult_range hifi_pll_mult_range = {
-	.min = 32,
-	.max = 64,
+static const struct pll_params_table hifi_pll_params_table[] = {
+	PLL_PARAMS(128, 5),
+	{ },
 };
 
 static const struct reg_sequence hifi_init_regs[] = {
@@ -124,7 +124,7 @@  static struct clk_regmap hifi_pll = {
 			.shift   = 6,
 			.width   = 1,
 		},
-		.range = &hifi_pll_mult_range,
+		.table = hifi_pll_params_table,
 		.init_regs = hifi_init_regs,
 		.init_count = ARRAY_SIZE(hifi_init_regs),
 	},