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From: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>
CC: John Youn <John.Youn@synopsys.com>,
Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
Subject: [PATCH 5/7] usb: dwc2: New bit definition in GPWRDN register
Thread-Topic: [PATCH 5/7] usb: dwc2: New bit definition in GPWRDN register
Thread-Index: AQHadSebTSuUMsJdWkeKj0XlT3h/yQ==
Date: Wed, 13 Mar 2024 09:19:52 +0000
Message-ID:
<56d05a4f5750aaa58d8c5bab7705814942a985bd.1708948356.git.Minas.Harutyunyan@synopsys.com>
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impostorscore=0 phishscore=0 spamscore=0 mlxscore=0 malwarescore=0
lowpriorityscore=0 bulkscore=0 suspectscore=0 priorityscore=1501
clxscore=1015 adultscore=0 mlxlogscore=999 classifier=spam adjust=0
reason=mlx scancount=1 engine=8.19.0-2402120000
definitions=main-2403130068
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usb: dwc2: Updates for new core v5.00a
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diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h index c1d5d46c33e3..5e449393b0d7 100644 --- a/drivers/usb/dwc2/hw.h +++ b/drivers/usb/dwc2/hw.h @@ -333,6 +333,8 @@ #define GLPMCFG_LPMCAP BIT(0) #define GPWRDN HSOTG_REG(0x0058) + +#define GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY BIT(29) #define GPWRDN_MULT_VAL_ID_BC_MASK (0x1f << 24) #define GPWRDN_MULT_VAL_ID_BC_SHIFT 24 #define GPWRDN_ADP_INT BIT(23)
Added new bit ULPI_LATCH_EN_DURING_HIB_ENTRY in GPWRDN register. This bit applicable HSOTG cores v5.00 or higher. Affects Hibernation Entry and Exit sequence (for both Host and Device) when using ULPI PHY. Signed-off-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com> --- drivers/usb/dwc2/hw.h | 2 ++ 1 file changed, 2 insertions(+)