diff mbox series

[PATCH-for-9.1,16/27] target/openrisc: Convert to TCGCPUOps::get_cpu_state()

Message ID 20240319154258.71206-17-philmd@linaro.org
State New
Headers show
Series accel/tcg: Introduce TCGCPUOps::get_cpu_state() handler | expand

Commit Message

Philippe Mathieu-Daudé March 19, 2024, 3:42 p.m. UTC 
Convert cpu_get_tb_cpu_state() to TCGCPUOps::get_cpu_state().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/openrisc/cpu.h | 12 ------------
 target/openrisc/cpu.c | 11 +++++++++++
 2 files changed, 11 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index d42800242f..6997c7534e 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -351,18 +351,6 @@  static inline void cpu_set_gpr(CPUOpenRISCState *env, int i, uint32_t val)
     env->shadow_gpr[0][i] = val;
 }
 
-#define TARGET_HAS_CPU_GET_TB_CPU_STATE
-
-static inline void cpu_get_tb_cpu_state(CPUOpenRISCState *env, vaddr *pc,
-                                        uint64_t *cs_base, uint32_t *flags)
-{
-    *pc = env->pc;
-    *cs_base = 0;
-    *flags = (env->dflag ? TB_FLAGS_DFLAG : 0)
-           | (cpu_get_gpr(env, 0) ? 0 : TB_FLAGS_R0_0)
-           | (env->sr & (SR_SM | SR_DME | SR_IME | SR_OVE));
-}
-
 static inline uint32_t cpu_get_sr(const CPUOpenRISCState *env)
 {
     return (env->sr
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 33c45dbf04..ce44ac0316 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -62,6 +62,16 @@  static void openrisc_restore_state_to_opc(CPUState *cs,
     }
 }
 
+static void openrisc_get_cpu_state(CPUOpenRISCState *env, vaddr *pc,
+                                   uint64_t *cs_base, uint32_t *flags)
+{
+    *pc = env->pc;
+    *cs_base = 0;
+    *flags = (env->dflag ? TB_FLAGS_DFLAG : 0)
+             | (cpu_get_gpr(env, 0) ? 0 : TB_FLAGS_R0_0)
+             | (env->sr & (SR_SM | SR_DME | SR_IME | SR_OVE));
+}
+
 static bool openrisc_cpu_has_work(CPUState *cs)
 {
     return cs->interrupt_request & (CPU_INTERRUPT_HARD |
@@ -229,6 +239,7 @@  static const TCGCPUOps openrisc_tcg_ops = {
     .initialize = openrisc_translate_init,
     .synchronize_from_tb = openrisc_cpu_synchronize_from_tb,
     .restore_state_to_opc = openrisc_restore_state_to_opc,
+    .get_cpu_state = openrisc_get_cpu_state,
 
 #ifndef CONFIG_USER_ONLY
     .tlb_fill = openrisc_cpu_tlb_fill,