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[PULL,8/9] target/hppa: mask privilege bits in mfia

Message ID 20240320003223.554145-9-richard.henderson@linaro.org
State Accepted
Commit b5e0b3a53c983c4a9620a44a6a557b389e589218
Headers show
Series [PULL,1/9] target/hppa: Fix assemble_16 insns for wide mode | expand

Commit Message

Richard Henderson March 20, 2024, 12:32 a.m. UTC 
From: Sven Schnelle <svens@stackframe.org>

mfia should return only the iaoq bits without privilege
bits.

Fixes: 98a9cb792c8 ("target-hppa: Implement system and memory-management insns")
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Helge Deller <deller@gmx.de>
Message-Id: <20240319161921.487080-6-svens@stackframe.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 107d7f1a85..19594f917e 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2011,7 +2011,7 @@  static bool trans_mfia(DisasContext *ctx, arg_mfia *a)
 {
     unsigned rt = a->t;
     TCGv_i64 tmp = dest_gpr(ctx, rt);
-    tcg_gen_movi_i64(tmp, ctx->iaoq_f);
+    tcg_gen_movi_i64(tmp, ctx->iaoq_f & ~3ULL);
     save_gpr(ctx, rt, tmp);
 
     cond_free(&ctx->null_cond);