diff mbox series

[PATCH-for-9.0?,v2,5/8] hw/clock: Pass optional &bool argument to clock_set_mul_div()

Message ID 20240325133259.57235-6-philmd@linaro.org
State New
Headers show
Series hw/clock: Propagate clock changes when STM32L4X5 MUX is updated | expand

Commit Message

Philippe Mathieu-Daudé March 25, 2024, 1:32 p.m. UTC 
Pass optional &bool argument to clock_set_ns().
Since all callers ignore the return value, have
them use NULL.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 docs/devel/clocks.rst   | 4 ++++
 include/hw/clock.h      | 3 ++-
 hw/arm/msf2-soc.c       | 2 +-
 hw/arm/stm32f100_soc.c  | 2 +-
 hw/arm/stm32f205_soc.c  | 2 +-
 hw/arm/stm32f405_soc.c  | 2 +-
 hw/core/clock.c         | 7 ++++++-
 hw/misc/stm32l4x5_rcc.c | 2 +-
 8 files changed, 17 insertions(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/docs/devel/clocks.rst b/docs/devel/clocks.rst
index 3360e5616d..027a3c5dbc 100644
--- a/docs/devel/clocks.rst
+++ b/docs/devel/clocks.rst
@@ -279,6 +279,10 @@  You can change the multiplier and divider of a clock at runtime,
 so you can use this to model clock controller devices which
 have guest-programmable frequency multipliers or dividers.
 
+Similary to ``clock_set()``, ``clock_set_mul_div()`` takes an optional
+boolean pointer which is set to ``true`` if the clock state was modified,
+that it, if the multiplier or the diviser or both were changed by the call.
+
 Note that ``clock_set_mul_div()`` does not automatically call
 ``clock_propagate()``. If you make a runtime change to the
 multiplier or divider you must call clock_propagate() yourself.
diff --git a/include/hw/clock.h b/include/hw/clock.h
index f0ac410fc8..0e4c5b67a2 100644
--- a/include/hw/clock.h
+++ b/include/hw/clock.h
@@ -376,6 +376,7 @@  char *clock_display_freq(Clock *clk);
  * Note that this function does not call clock_propagate(); the
  * caller should do that if necessary.
  */
-void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider);
+void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider,
+                       bool *changed);
 
 #endif /* QEMU_HW_CLOCK_H */
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index a94a10adcc..7257bd5ded 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -111,7 +111,7 @@  static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
      * implement the divisor as a fixed /32, which matches the reset value
      * of SYSTICK_CR.
      */
-    clock_set_mul_div(s->refclk, 32, 1);
+    clock_set_mul_div(s->refclk, 32, 1, NULL);
     clock_set_source(s->refclk, s->m3clk);
 
     memory_region_init_rom(&s->nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size,
diff --git a/hw/arm/stm32f100_soc.c b/hw/arm/stm32f100_soc.c
index 808b783515..4879bd6188 100644
--- a/hw/arm/stm32f100_soc.c
+++ b/hw/arm/stm32f100_soc.c
@@ -93,7 +93,7 @@  static void stm32f100_soc_realize(DeviceState *dev_soc, Error **errp)
      */
 
     /* The refclk always runs at frequency HCLK / 8 */
-    clock_set_mul_div(s->refclk, 8, 1);
+    clock_set_mul_div(s->refclk, 8, 1, NULL);
     clock_set_source(s->refclk, s->sysclk);
 
     /*
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index a451e21f59..aeb0cb0a5a 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -110,7 +110,7 @@  static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
      */
 
     /* The refclk always runs at frequency HCLK / 8 */
-    clock_set_mul_div(s->refclk, 8, 1);
+    clock_set_mul_div(s->refclk, 8, 1, NULL);
     clock_set_source(s->refclk, s->sysclk);
 
     memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash",
diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c
index 2ad5b79a06..07cf0e8287 100644
--- a/hw/arm/stm32f405_soc.c
+++ b/hw/arm/stm32f405_soc.c
@@ -115,7 +115,7 @@  static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp)
      */
 
     /* The refclk always runs at frequency HCLK / 8 */
-    clock_set_mul_div(s->refclk, 8, 1);
+    clock_set_mul_div(s->refclk, 8, 1, NULL);
     clock_set_source(s->refclk, s->sysclk);
 
     memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F405.flash",
diff --git a/hw/core/clock.c b/hw/core/clock.c
index e0f257b141..6ef60a2423 100644
--- a/hw/core/clock.c
+++ b/hw/core/clock.c
@@ -145,7 +145,8 @@  char *clock_display_freq(Clock *clk)
     return freq_to_str(clock_get_hz(clk));
 }
 
-void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider)
+void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider,
+                       bool *changed)
 {
     assert(divider != 0);
 
@@ -157,6 +158,10 @@  void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider)
                             clk->divider, divider);
     clk->multiplier = multiplier;
     clk->divider = divider;
+
+    if (changed) {
+        *changed = true;
+    }
 }
 
 static void clock_initfn(Object *obj)
diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c
index bc2d63528b..f01113308a 100644
--- a/hw/misc/stm32l4x5_rcc.c
+++ b/hw/misc/stm32l4x5_rcc.c
@@ -59,7 +59,7 @@  static void clock_mux_update(RccClockMuxState *mux, bool bypass_source)
         freq_multiplier = mux->divider;
     }
 
-    clock_set_mul_div(mux->out, freq_multiplier, mux->multiplier);
+    clock_set_mul_div(mux->out, freq_multiplier, mux->multiplier, NULL);
     clock_update(mux->out, clock_get(current_source));
 
     src_freq = clock_get_hz(current_source);