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[RFC,02/13] dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC

Message ID 20240326222844.1422948-3-prabhakar.mahadev-lad.rj@bp.renesas.com
State New
Headers show
Series Add PFC support for Renesas RZ/V2H(P) SoC | expand

Commit Message

Lad, Prabhakar March 26, 2024, 10:28 p.m. UTC 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add documentation for the pin controller found on the Renesas RZ/V2H(P)
(R9A09G057) SoC. Compared to RZ/G2L family of SoCs there are slight
differences on the RZ/V2H(P) SoC for pinmuxing.

Also add 'renesas-rzv2h,output-impedance' property. Drive strength
setting on RZ/V2H(P) depends on the different power rails which are
coming out from the PMIC (connected via i2c). These power rails
(required for drive strength) can be 1.2/1.8/3.3V.

Pin are grouped into 4 groups,

Group1: Impedance
- 150/75/38/25 ohms (at 3.3 V)
- 130/65/33/22 ohms (at 1.8 V)

Group2: Impedance
- 50/40/33/25 ohms (at 1.8 V)

Group3: Impedance
- 150/75/37.5/25 ohms (at 3.3 V)
- 130/65/33/22 ohms (at 1.8 V)

Group4: Impedance
- 110/55/30/20 ohms (at 1.8 V)
- 150/75/38/25 ohms (at 1.2 V)

'renesas-rzv2h,output-impedance' property as documented which can be
[1, 2, 4, 6] indicates x Value strength.

As the power rail information cannot be available very early in the
boot process as 'renesas-rzv2h,output-impedance' property is added
instead of reusing output-impedance-ohms property.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../pinctrl/renesas,rzg2l-pinctrl.yaml        | 22 +++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
index 881e992adca3..77f4fc7f4a21 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
@@ -26,6 +26,7 @@  properties:
               - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
               - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
               - renesas,r9a08g045-pinctrl # RZ/G3S
+              - renesas,r9a09g057-pinctrl # RZ/V2H(P)
 
       - items:
           - enum:
@@ -66,10 +67,14 @@  properties:
     maxItems: 1
 
   resets:
-    items:
-      - description: GPIO_RSTN signal
-      - description: GPIO_PORT_RESETN signal
-      - description: GPIO_SPARE_RESETN signal
+    oneOf:
+      - items:
+          - description: GPIO_RSTN signal
+          - description: GPIO_PORT_RESETN signal
+          - description: GPIO_SPARE_RESETN signal
+      - items:
+          - description: PFC main reset
+          - description: Reset for the control register related to WDTUDFCA and WDTUDFFCM pins
 
 additionalProperties:
   anyOf:
@@ -111,6 +116,15 @@  additionalProperties:
         output-high: true
         output-low: true
         line-name: true
+        renesas-rzv2h,output-impedance:
+          description: |
+            Output impedance for pins on RZ/V2H(P) SoC.
+            x1: Corresponds to 0 in IOLH register.
+            x2: Corresponds to 1 in IOLH register.
+            x4: Corresponds to 2 in IOLH register.
+            x6: Corresponds to 3 in IOLH register.
+          $ref: /schemas/types.yaml#/definitions/uint32
+          enum: [1, 2, 4, 6]
 
     - type: object
       additionalProperties: