Message ID | g4r59vtupw.fsf@linaro.org |
---|---|
State | Superseded |
Headers | show |
On Fri, 2011-03-25 at 09:28 +0000, Richard Sandiford wrote: > Richard Earnshaw <rearnsha@arm.com> writes: > > On Thu, 2011-03-24 at 15:40 +0000, Richard Sandiford wrote: > >> gcc/ > >> * config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Restrict FPA_REGS > >> case to VFPv1. > >> > > > > GCC doesn't support VFPv1 (see the all_fpus table), and I don't think > > many chips based on that ever escaped into the wild world, so I'm not > > worried about trying to add that now. > > > > So it's probably safe to just kill that check for VFP entirely. > > Even better. :-) How does this look? Tested on arm-linux-gnueabi, > no regressions. > > Richard > > > gcc/ > * config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Restrict FPA_REGS > case to VFPv1. > I think adding a comment that VFPv1 would require a restriction but that that isn't supported would be useful. Then if the worst happens it will be one less bug to go track down. OK with that change. R.
Index: gcc/config/arm/arm.h =================================================================== --- gcc/config/arm/arm.h 2011-03-24 17:21:52.000000000 +0000 +++ gcc/config/arm/arm.h 2011-03-24 18:39:09.000000000 +0000 @@ -1167,12 +1167,10 @@ #define IRA_COVER_CLASSES \ } /* FPA registers can't do subreg as all values are reformatted to internal - precision. VFP registers may only be accessed in the mode they - were set. */ -#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ - (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ - ? reg_classes_intersect_p (FPA_REGS, (CLASS)) \ - || reg_classes_intersect_p (VFP_REGS, (CLASS)) \ + precision. */ +#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ + (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ + ? reg_classes_intersect_p (FPA_REGS, (CLASS)) \ : 0) /* The class value for index registers, and the one for base regs. */