| Message ID | bbc03f8d33c538b36e366e289861b90adbe64a37.1712833493.git.lorenzo@kernel.org |
|---|---|
| State | New |
| Headers | show |
| Series | Add add SPI-NAND Flash controller driver for EN7581 | expand |
On 11/04/2024 13:08, Lorenzo Bianconi wrote: > Introduce Airoha EN7581 SPI NAND controller binding > > Tested-by: Rajeev Kumar <Rajeev.Kumar@airoha.com> > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > --- > .../bindings/spi/airoha,spi-airoha-snfi.yaml | 56 +++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml > > diff --git a/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml b/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml > new file mode 100644 > index 000000000000..0244f242eff1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml Use compatible as filename. > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/airoha,spi-airoha-snfi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: SPI-NAND flash controller for Airoha ARM SoCs > + > +maintainers: > + - Lorenzo Bianconi <lorenzo@kernel.org> > + > +allOf: > + - $ref: spi-controller.yaml# > + > +properties: > + compatible: > + const: airoha,en7581-snand > + > + reg: > + maxItems: 2 Instead list and describe items. > + > + interrupts: > + maxItems: 1 This looks incomplete. No clocks? No other resources? Best regards, Krzysztof
> On 11/04/2024 13:08, Lorenzo Bianconi wrote: > > Introduce Airoha EN7581 SPI NAND controller binding > > > > Tested-by: Rajeev Kumar <Rajeev.Kumar@airoha.com> > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > > --- > > .../bindings/spi/airoha,spi-airoha-snfi.yaml | 56 +++++++++++++++++++ > > 1 file changed, 56 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml > > > > diff --git a/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml b/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml > > new file mode 100644 > > index 000000000000..0244f242eff1 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml > > Use compatible as filename. ack, I will fix it. > > > @@ -0,0 +1,56 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/spi/airoha,spi-airoha-snfi.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: SPI-NAND flash controller for Airoha ARM SoCs > > + > > +maintainers: > > + - Lorenzo Bianconi <lorenzo@kernel.org> > > + > > +allOf: > > + - $ref: spi-controller.yaml# > > + > > +properties: > > + compatible: > > + const: airoha,en7581-snand > > + > > + reg: > > + maxItems: 2 > > Instead list and describe items. ack, I will fix it. > > > + > > + interrupts: > > + maxItems: 1 > > This looks incomplete. No clocks? No other resources? actually spi-snand relies on a fixed-rate clock. I will fix it. Regards, Lorenzo > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml b/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml new file mode 100644 index 000000000000..0244f242eff1 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/airoha,spi-airoha-snfi.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/airoha,spi-airoha-snfi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SPI-NAND flash controller for Airoha ARM SoCs + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: airoha,en7581-snand + + reg: + maxItems: 2 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + spi@1fa10000 { + compatible = "airoha,en7581-snand"; + reg = <0x0 0x1fa10000 0x0 0x140>, + <0x0 0x1fa11000 0x0 0x160>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "spi-nand"; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <2>; + }; + }; + };