| Message ID | 20240418124300.1387978-7-cleger@rivosinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add support for a few Zc* extensions as well as Zcmop | expand |
On Thu, Apr 18, 2024 at 6:14 PM Clément Léger <cleger@rivosinc.com> wrote: > > Extend the KVM ISA extension ONE_REG interface to allow KVM user space > to detect and enable Zca, Zcf, Zcd and Zcb extensions for Guest/VM. > > Signed-off-by: Clément Léger <cleger@rivosinc.com> LGTM. Reviewed-by: Anup Patel <anup@brainfault.org> Acked-by: Anup Patel <anup@brainfault.org> Thanks, Anup > --- > arch/riscv/include/uapi/asm/kvm.h | 4 ++++ > arch/riscv/kvm/vcpu_onereg.c | 8 ++++++++ > 2 files changed, 12 insertions(+) > > diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h > index 35a12aa1953e..57db3fea679f 100644 > --- a/arch/riscv/include/uapi/asm/kvm.h > +++ b/arch/riscv/include/uapi/asm/kvm.h > @@ -168,6 +168,10 @@ enum KVM_RISCV_ISA_EXT_ID { > KVM_RISCV_ISA_EXT_ZTSO, > KVM_RISCV_ISA_EXT_ZACAS, > KVM_RISCV_ISA_EXT_ZIMOP, > + KVM_RISCV_ISA_EXT_ZCA, > + KVM_RISCV_ISA_EXT_ZCB, > + KVM_RISCV_ISA_EXT_ZCD, > + KVM_RISCV_ISA_EXT_ZCF, > KVM_RISCV_ISA_EXT_MAX, > }; > > diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c > index 12436f6f0d20..a2747a6dbdb6 100644 > --- a/arch/riscv/kvm/vcpu_onereg.c > +++ b/arch/riscv/kvm/vcpu_onereg.c > @@ -48,6 +48,10 @@ static const unsigned long kvm_isa_ext_arr[] = { > KVM_ISA_EXT_ARR(ZBKC), > KVM_ISA_EXT_ARR(ZBKX), > KVM_ISA_EXT_ARR(ZBS), > + KVM_ISA_EXT_ARR(ZCA), > + KVM_ISA_EXT_ARR(ZCB), > + KVM_ISA_EXT_ARR(ZCD), > + KVM_ISA_EXT_ARR(ZCF), > KVM_ISA_EXT_ARR(ZFA), > KVM_ISA_EXT_ARR(ZFH), > KVM_ISA_EXT_ARR(ZFHMIN), > @@ -128,6 +132,10 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) > case KVM_RISCV_ISA_EXT_ZBKC: > case KVM_RISCV_ISA_EXT_ZBKX: > case KVM_RISCV_ISA_EXT_ZBS: > + case KVM_RISCV_ISA_EXT_ZCA: > + case KVM_RISCV_ISA_EXT_ZCB: > + case KVM_RISCV_ISA_EXT_ZCD: > + case KVM_RISCV_ISA_EXT_ZCF: > case KVM_RISCV_ISA_EXT_ZFA: > case KVM_RISCV_ISA_EXT_ZFH: > case KVM_RISCV_ISA_EXT_ZFHMIN: > -- > 2.43.0 >
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index 35a12aa1953e..57db3fea679f 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -168,6 +168,10 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_ZTSO, KVM_RISCV_ISA_EXT_ZACAS, KVM_RISCV_ISA_EXT_ZIMOP, + KVM_RISCV_ISA_EXT_ZCA, + KVM_RISCV_ISA_EXT_ZCB, + KVM_RISCV_ISA_EXT_ZCD, + KVM_RISCV_ISA_EXT_ZCF, KVM_RISCV_ISA_EXT_MAX, }; diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 12436f6f0d20..a2747a6dbdb6 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -48,6 +48,10 @@ static const unsigned long kvm_isa_ext_arr[] = { KVM_ISA_EXT_ARR(ZBKC), KVM_ISA_EXT_ARR(ZBKX), KVM_ISA_EXT_ARR(ZBS), + KVM_ISA_EXT_ARR(ZCA), + KVM_ISA_EXT_ARR(ZCB), + KVM_ISA_EXT_ARR(ZCD), + KVM_ISA_EXT_ARR(ZCF), KVM_ISA_EXT_ARR(ZFA), KVM_ISA_EXT_ARR(ZFH), KVM_ISA_EXT_ARR(ZFHMIN), @@ -128,6 +132,10 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) case KVM_RISCV_ISA_EXT_ZBKC: case KVM_RISCV_ISA_EXT_ZBKX: case KVM_RISCV_ISA_EXT_ZBS: + case KVM_RISCV_ISA_EXT_ZCA: + case KVM_RISCV_ISA_EXT_ZCB: + case KVM_RISCV_ISA_EXT_ZCD: + case KVM_RISCV_ISA_EXT_ZCF: case KVM_RISCV_ISA_EXT_ZFA: case KVM_RISCV_ISA_EXT_ZFH: case KVM_RISCV_ISA_EXT_ZFHMIN:
Extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Zca, Zcf, Zcd and Zcb extensions for Guest/VM. Signed-off-by: Clément Léger <cleger@rivosinc.com> --- arch/riscv/include/uapi/asm/kvm.h | 4 ++++ arch/riscv/kvm/vcpu_onereg.c | 8 ++++++++ 2 files changed, 12 insertions(+)