| Message ID | 1714494711-10322-2-git-send-email-quic_msarkar@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Adding iommus property and setting max link speed for PCIe | expand |
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 9065645..0c52180 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3666,6 +3666,7 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>; interconnect-names = "pcie-mem", "cpu-pcie"; + iommus = <&pcie_smmu 0x0000 0x7f>; iommu-map = <0x0 &pcie_smmu 0x0000 0x1>, <0x100 &pcie_smmu 0x0001 0x1>; @@ -3822,6 +3823,7 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_1 0>; interconnect-names = "pcie-mem", "cpu-pcie"; + iommus = <&pcie_smmu 0x0080 0x7f>; iommu-map = <0x0 &pcie_smmu 0x0080 0x1>, <0x100 &pcie_smmu 0x0081 0x1>;
'iommus' is a list of phandle and IOMMU specifier pairs that describe the IOMMU master interfaces of the device. Specified this property in PCIe DT nodes so that IOMMU can be used for address translation. Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 ++ 1 file changed, 2 insertions(+)