diff mbox series

tools/power/cpupower: Fix Pstate frequency reporting on AMD Family 1Ah CPUs

Message ID 20240430083706.69641-1-Dhananjay.Ugwekar@amd.com
State Accepted
Commit 43cad521c6d228ea0c51e248f8e5b3a6295a2849
Headers show
Series tools/power/cpupower: Fix Pstate frequency reporting on AMD Family 1Ah CPUs | expand

Commit Message

Dhananjay Ugwekar April 30, 2024, 8:37 a.m. UTC
Update cpupower's P-State frequency calculation and reporting with AMD 
Family 1Ah+ processors, when using the acpi-cpufreq driver. This is due 
to a change in the PStateDef MSR layout in AMD Family 1Ah+.

[ dhananjay: commit log, tested on 4th and 5th Gen AMD EPYC system ]

Signed-off-by: Ananth Narayan <Ananth.Narayan@amd.com>
Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
---
 tools/power/cpupower/utils/helpers/amd.c | 26 +++++++++++++++++++++---
 1 file changed, 23 insertions(+), 3 deletions(-)

Comments

Mario Limonciello April 30, 2024, 5:06 p.m. UTC | #1
On 4/30/2024 03:37, Dhananjay Ugwekar wrote:
> Update cpupower's P-State frequency calculation and reporting with AMD
> Family 1Ah+ processors, when using the acpi-cpufreq driver. This is due
> to a change in the PStateDef MSR layout in AMD Family 1Ah+.
> 
> [ dhananjay: commit log, tested on 4th and 5th Gen AMD EPYC system ]
> 
> Signed-off-by: Ananth Narayan <Ananth.Narayan@amd.com>
> Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   tools/power/cpupower/utils/helpers/amd.c | 26 +++++++++++++++++++++---
>   1 file changed, 23 insertions(+), 3 deletions(-)
> 
> diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c
> index c519cc89c97f..0a56e22240fc 100644
> --- a/tools/power/cpupower/utils/helpers/amd.c
> +++ b/tools/power/cpupower/utils/helpers/amd.c
> @@ -41,6 +41,16 @@ union core_pstate {
>   		unsigned res1:31;
>   		unsigned en:1;
>   	} pstatedef;
> +	/* since fam 1Ah: */
> +	struct {
> +		unsigned fid:12;
> +		unsigned res1:2;
> +		unsigned vid:8;
> +		unsigned iddval:8;
> +		unsigned idddiv:2;
> +		unsigned res2:31;
> +		unsigned en:1;
> +	} pstatedef2;
>   	unsigned long long val;
>   };
>   
> @@ -48,6 +58,10 @@ static int get_did(union core_pstate pstate)
>   {
>   	int t;
>   
> +	/* Fam 1Ah onward do not use did */
> +	if (cpupower_cpu_info.family >= 0x1A)
> +		return 0;
> +
>   	if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_PSTATEDEF)
>   		t = pstate.pstatedef.did;
>   	else if (cpupower_cpu_info.family == 0x12)
> @@ -61,12 +75,18 @@ static int get_did(union core_pstate pstate)
>   static int get_cof(union core_pstate pstate)
>   {
>   	int t;
> -	int fid, did, cof;
> +	int fid, did, cof = 0;
>   
>   	did = get_did(pstate);
>   	if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_PSTATEDEF) {
> -		fid = pstate.pstatedef.fid;
> -		cof = 200 * fid / did;
> +		if (cpupower_cpu_info.family >= 0x1A) {
> +			fid = pstate.pstatedef2.fid;
> +			if (fid > 0x0f)
> +				cof = (fid * 5);
> +		} else {
> +			fid = pstate.pstatedef.fid;
> +			cof = 200 * fid / did;
> +		}
>   	} else {
>   		t = 0x10;
>   		fid = pstate.pstate.fid;
Shuah Khan May 2, 2024, 3:41 p.m. UTC | #2
On 4/30/24 11:06, Mario Limonciello wrote:
> On 4/30/2024 03:37, Dhananjay Ugwekar wrote:
>> Update cpupower's P-State frequency calculation and reporting with AMD
>> Family 1Ah+ processors, when using the acpi-cpufreq driver. This is due
>> to a change in the PStateDef MSR layout in AMD Family 1Ah+.
>>
>> [ dhananjay: commit log, tested on 4th and 5th Gen AMD EPYC system ]
>>
>> Signed-off-by: Ananth Narayan <Ananth.Narayan@amd.com>
>> Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>

Thank you. Applied to

git.kernel.org/pub/scm/linux/kernel/git/shuah/linux.git/log/ cpupower
branch for Linux 6.10-rc1.

I will include it in my pull request to Rafael.

thanks
-- Shuah
diff mbox series

Patch

diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c
index c519cc89c97f..0a56e22240fc 100644
--- a/tools/power/cpupower/utils/helpers/amd.c
+++ b/tools/power/cpupower/utils/helpers/amd.c
@@ -41,6 +41,16 @@  union core_pstate {
 		unsigned res1:31;
 		unsigned en:1;
 	} pstatedef;
+	/* since fam 1Ah: */
+	struct {
+		unsigned fid:12;
+		unsigned res1:2;
+		unsigned vid:8;
+		unsigned iddval:8;
+		unsigned idddiv:2;
+		unsigned res2:31;
+		unsigned en:1;
+	} pstatedef2;
 	unsigned long long val;
 };
 
@@ -48,6 +58,10 @@  static int get_did(union core_pstate pstate)
 {
 	int t;
 
+	/* Fam 1Ah onward do not use did */
+	if (cpupower_cpu_info.family >= 0x1A)
+		return 0;
+
 	if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_PSTATEDEF)
 		t = pstate.pstatedef.did;
 	else if (cpupower_cpu_info.family == 0x12)
@@ -61,12 +75,18 @@  static int get_did(union core_pstate pstate)
 static int get_cof(union core_pstate pstate)
 {
 	int t;
-	int fid, did, cof;
+	int fid, did, cof = 0;
 
 	did = get_did(pstate);
 	if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_PSTATEDEF) {
-		fid = pstate.pstatedef.fid;
-		cof = 200 * fid / did;
+		if (cpupower_cpu_info.family >= 0x1A) {
+			fid = pstate.pstatedef2.fid;
+			if (fid > 0x0f)
+				cof = (fid * 5);
+		} else {
+			fid = pstate.pstatedef.fid;
+			cof = 200 * fid / did;
+		}
 	} else {
 		t = 0x10;
 		fid = pstate.pstate.fid;