[v3,15/40] fsi: aspeed: Use common initialization and link enable

Message ID	20240516181907.3468796-16-eajames@linux.ibm.com
State	Superseded
Headers	show Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6440915747B; Thu, 16 May 2024 18:20:04 +0000 (UTC) From: Eddie James <eajames@linux.ibm.com> To: linux-fsi@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, joel@jms.id.au, alistair@popple.id.au, jk@ozlabs.org, andrew@codeconstruct.com.au, linux-aspeed@lists.ozlabs.org, eajames@linux.ibm.com Subject: [PATCH v3 15/40] fsi: aspeed: Use common initialization and link enable Date: Thu, 16 May 2024 13:18:42 -0500 Message-Id: <20240516181907.3468796-16-eajames@linux.ibm.com> In-Reply-To: <20240516181907.3468796-1-eajames@linux.ibm.com> References: <20240516181907.3468796-1-eajames@linux.ibm.com> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	fsi: Add interrupt support \| expand [v3,00/40] fsi: Add interrupt support [v3,01/40] fsi: hub: Set master index to link number plus one [v3,02/40] fsi: Move slave definitions to fsi-slave.h [v3,03/40] fsi: Fix slave addressing after break command [v3,04/40] fsi: Use a defined value for default echo delay [v3,05/40] fsi: Calculate local bus clock frequency [v3,06/40] fsi: core: Improve master read/write/error traces [v3,07/40] fsi: core: Add slave error trace [v3,08/40] fsi: core: Reset errors instead of clearing interrupts [v3,09/40] fsi: aspeed: Add AST2700 support [v3,10/40] fsi: core: Add slave spinlock [v3,11/40] fsi: core: Allow cfam device type aliases [v3,12/40] fsi: core: Add common regmap master functions [v3,13/40] fsi: core: Disable relative addressing during scan [v3,14/40] fsi: hub: Use common initialization and link enable [v3,15/40] fsi: aspeed: Use common initialization and link enable [v3,16/40] fsi: aspeed: Remove cfam reset sysfs file in error path and remove [v3,17/40] fsi: aspeed: Refactor trace functions [v3,18/40] fsi: aspeed: Don't clear all IRQs during OPB transfers [v3,19/40] fsi: aspeed: Only read result register for successful read [v3,20/40] fsi: aspeed: Switch to spinlock [v3,21/40] fsi: aspeed: Disable relative addressing and IPOLL for cfam reset [v3,22/40] fsi: aspeed: Use common master error handler [v3,23/40] fsi: core: Add interrupt support [v3,24/40] fsi: aspeed: Add interrupt support [v3,25/40] fsi: hub: Add interrupt support [v3,26/40] i2c: fsi: Calculate clock divider from local bus frequency [v3,27/40] i2c: fsi: Improve formatting [v3,28/40] i2c: fsi: Change fsi_i2c_write_reg to accept data instead of a pointer [v3,29/40] i2c: fsi: Remove list structure of ports [v3,30/40] i2c: fsi: Define a function to check status error bits [v3,31/40] i2c: fsi: Add boolean for skip stop command on abort [v3,32/40] i2c: fsi: Add interrupt support [v3,33/40] fsi: hub master: Reset hub master after errors [v3,34/40] fsi: core: Add master register read-only sysfs [v3,35/40] fsi: core: Add slave register read-only sysfs [v3,36/40] fsi: i2cr: Adjust virtual CFAM ID to match Odyssey chip [v3,37/40] fsi: core: Add different types of CFAM [v3,38/40] spi: fsi: Calculate clock divider from local bus frequency [v3,39/40] ARM: dts: aspeed: P10 and tacoma: Set FSI clock frequency [v3,40/40] ARM: dts: aspeed: P10: Bump SPI max frequencies

diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index 3d15e867237df..a67f185bb8814 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -27,6 +27,7 @@ struct fsi_master_aspeed { struct mutex lock; /* protect HW access */ struct device *dev; void __iomem *base; + void __iomem *ctrl; struct clk *clk; struct gpio_desc *cfam_reset_gpio; }; @@ -95,14 +96,6 @@ static const u32 fsi_base = 0xa0000000; #define CREATE_TRACE_POINTS #include <trace/events/fsi_master_aspeed.h> -#define FSI_LINK_ENABLE_SETUP_TIME 10 /* in mS */ - -/* Run the bus at maximum speed by default */ -#define FSI_DIVISOR_DEFAULT 1 -#define FSI_DIVISOR_CABLED 2 -static u16 aspeed_fsi_divisor = FSI_DIVISOR_DEFAULT; -module_param_named(bus_div,aspeed_fsi_divisor, ushort, 0); - #define OPB_POLL_TIMEOUT 500 static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr, @@ -333,35 +326,6 @@ static int aspeed_master_write(struct fsi_master *master, int link, return ret; } -static int aspeed_master_link_enable(struct fsi_master *master, int link, - bool enable) -{ - struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master); - int idx, bit, ret; - __be32 reg; - - idx = link / 32; - bit = link % 32; - - reg = cpu_to_be32(0x80000000 >> bit); - - mutex_lock(&aspeed->lock); - - if (!enable) { - ret = opb_writel(aspeed, ctrl_base + FSI_MCENP0 + (4 * idx), reg); - goto done; - } - - ret = opb_writel(aspeed, ctrl_base + FSI_MSENP0 + (4 * idx), reg); - if (ret) - goto done; - - mdelay(FSI_LINK_ENABLE_SETUP_TIME); -done: - mutex_unlock(&aspeed->lock); - return ret; -} - static int aspeed_master_term(struct fsi_master *master, int link, uint8_t id) { uint32_t addr; @@ -389,72 +353,54 @@ static void aspeed_master_release(struct device *dev) struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(to_fsi_master(dev)); + regmap_exit(aspeed->master.map); kfree(aspeed); } -/* mmode encoders */ -static inline u32 fsi_mmode_crs0(u32 x) +static int regmap_aspeed_opb_read(void *context, unsigned int reg, unsigned int *val) { - return (x & FSI_MMODE_CRS0MASK) << FSI_MMODE_CRS0SHFT; -} + __be32 v; + int ret; -static inline u32 fsi_mmode_crs1(u32 x) -{ - return (x & FSI_MMODE_CRS1MASK) << FSI_MMODE_CRS1SHFT; + ret = opb_readl(context, ctrl_base + reg, &v); + if (ret) + return ret; + + *val = be32_to_cpu(v); + return 0; } -static int aspeed_master_init(struct fsi_master_aspeed *aspeed) +static int regmap_aspeed_opb_write(void *context, unsigned int reg, unsigned int val) { - __be32 reg; - - reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK - | FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE); - opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg); - - /* Initialize the MFSI (hub master) engine */ - reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK - | FSI_MRESP_RST_MCR | FSI_MRESP_RST_PYE); - opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg); - - reg = cpu_to_be32(FSI_MECTRL_EOAE | FSI_MECTRL_P8_AUTO_TERM); - opb_writel(aspeed, ctrl_base + FSI_MECTRL, reg); - - reg = cpu_to_be32(FSI_MMODE_ECRC | FSI_MMODE_EPC | FSI_MMODE_RELA - | fsi_mmode_crs0(aspeed_fsi_divisor) - | fsi_mmode_crs1(aspeed_fsi_divisor) - | FSI_MMODE_P8_TO_LSB); - dev_info(aspeed->dev, "mmode set to %08x (divisor %d)\n", - be32_to_cpu(reg), aspeed_fsi_divisor); - opb_writel(aspeed, ctrl_base + FSI_MMODE, reg); - - reg = cpu_to_be32(0xffff0000); - opb_writel(aspeed, ctrl_base + FSI_MDLYR, reg); - - reg = cpu_to_be32(~0); - opb_writel(aspeed, ctrl_base + FSI_MSENP0, reg); - - /* Leave enabled long enough for master logic to set up */ - mdelay(FSI_LINK_ENABLE_SETUP_TIME); - - opb_writel(aspeed, ctrl_base + FSI_MCENP0, reg); - - opb_readl(aspeed, ctrl_base + FSI_MAEB, NULL); + return opb_writel(context, ctrl_base + reg, cpu_to_be32(val)); +} - reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK); - opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg); +static const struct regmap_bus regmap_aspeed_opb = { + .reg_write = regmap_aspeed_opb_write, + .reg_read = regmap_aspeed_opb_read, +}; - opb_readl(aspeed, ctrl_base + FSI_MLEVP0, NULL); +static int regmap_ast2700_read(void *context, unsigned int reg, unsigned int *val) +{ + struct fsi_master_aspeed *aspeed = context; - /* Reset the master bridge */ - reg = cpu_to_be32(FSI_MRESB_RST_GEN); - opb_writel(aspeed, ctrl_base + FSI_MRESB0, reg); + *val = readl(aspeed->ctrl + reg); + return 0; +} - reg = cpu_to_be32(FSI_MRESB_RST_ERR); - opb_writel(aspeed, ctrl_base + FSI_MRESB0, reg); +static int regmap_ast2700_write(void *context, unsigned int reg, unsigned int val) +{ + struct fsi_master_aspeed *aspeed = context; + writel(val, aspeed->ctrl + reg); return 0; } +static const struct regmap_bus regmap_ast2700 = { + .reg_write = regmap_ast2700_write, + .reg_read = regmap_ast2700_read, +}; + static ssize_t cfam_reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { @@ -466,7 +412,7 @@ static ssize_t cfam_reset_store(struct device *dev, struct device_attribute *att usleep_range(900, 1000); gpiod_set_value(aspeed->cfam_reset_gpio, 0); usleep_range(900, 1000); - opb_writel(aspeed, ctrl_base + FSI_MRESP0, cpu_to_be32(FSI_MRESP_RST_ALL_MASTER)); + regmap_write(aspeed->master.map, FSI_MRESP0, FSI_MRESP_RST_ALL_MASTER); mutex_unlock(&aspeed->lock); trace_fsi_master_aspeed_cfam_reset(false); @@ -526,14 +472,6 @@ static int tacoma_cabled_fsi_fixup(struct device *dev) /* If the routing GPIO is high we should set the mux to low. */ if (gpio) { - /* - * Cable signal integrity means we should run the bus - * slightly slower. Do not override if a kernel param - * has already overridden. - */ - if (aspeed_fsi_divisor == FSI_DIVISOR_DEFAULT) - aspeed_fsi_divisor = FSI_DIVISOR_CABLED; - gpiod_direction_output(mux_gpio, 0); dev_info(dev, "FSI configured for external cable\n"); } else { @@ -549,9 +487,13 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) { const struct fsi_master_aspeed_data *md = of_device_get_match_data(&pdev->dev); u32 opb_retry_counter = md ? md->opb_retry_counter : OPB_RC_DEFAULT; + const struct regmap_bus *bus = &regmap_aspeed_opb; + struct regmap_config aspeed_master_regmap_config; struct fsi_master_aspeed *aspeed; - int rc, links, reg; - __be32 raw; + u32 opb_ctrl_base = ctrl_base; + struct resource *res; + unsigned int reg; + int rc, links; rc = tacoma_cabled_fsi_fixup(&pdev->dev); if (rc) { @@ -571,6 +513,17 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) goto err_free_aspeed; } + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl"); + if (res) { + aspeed->ctrl = devm_ioremap_resource(&pdev->dev, res); + if (!IS_ERR(aspeed->ctrl)) { + /* Access FSI controller over AHB */ + opb_ctrl_base = res->start; + opb_retry_counter &= ~OPB_RC_CTRL_OPB; + bus = &regmap_ast2700; + } + } + aspeed->clk = devm_clk_get(aspeed->dev, NULL); if (IS_ERR(aspeed->clk)) { dev_err(aspeed->dev, "couldn't get clock\n"); @@ -594,7 +547,7 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) writel(opb_retry_counter, aspeed->base + OPB_RETRY_COUNTER); - writel(ctrl_base, aspeed->base + OPB_CTRL_BASE); + writel(opb_ctrl_base, aspeed->base + OPB_CTRL_BASE); writel(fsi_base, aspeed->base + OPB_FSI_BASE); /* Set read data order */ @@ -611,13 +564,19 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) */ writel(0x1, aspeed->base + OPB0_SELECT); - rc = opb_readl(aspeed, ctrl_base + FSI_MVER, &raw); + fsi_master_regmap_config(&aspeed_master_regmap_config); + aspeed->master.map = regmap_init(&pdev->dev, bus, aspeed, &aspeed_master_regmap_config); + if (IS_ERR(aspeed->master.map)) { + rc = PTR_ERR(aspeed->master.map); + goto err_release; + } + + rc = regmap_read(aspeed->master.map, FSI_MVER, &reg); if (rc) { dev_err(&pdev->dev, "failed to read hub version\n"); - goto err_release; + goto err_regmap; } - reg = be32_to_cpu(raw); links = (reg >> 8) & 0xff; dev_info(&pdev->dev, "hub version %08x (%d links)\n", reg, links); @@ -626,20 +585,22 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) aspeed->master.dev.of_node = of_node_get(dev_of_node(&pdev->dev)); aspeed->master.n_links = links; + aspeed->master.flags = FSI_MASTER_FLAG_RELA; aspeed->master.read = aspeed_master_read; aspeed->master.write = aspeed_master_write; aspeed->master.send_break = aspeed_master_break; aspeed->master.term = aspeed_master_term; - aspeed->master.link_enable = aspeed_master_link_enable; dev_set_drvdata(&pdev->dev, aspeed); mutex_init(&aspeed->lock); - aspeed_master_init(aspeed); + rc = fsi_master_init(&aspeed->master, clk_get_rate(aspeed->clk)); + if (rc) + goto err_regmap; rc = fsi_master_register(&aspeed->master); if (rc) - goto err_release; + goto err_regmap; /* At this point, fsi_master_register performs the device_initialize(), * and holds the sole reference on master.dev. This means the device @@ -651,6 +612,8 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) get_device(&aspeed->master.dev); return 0; +err_regmap: + regmap_exit(aspeed->master.map); err_release: clk_disable_unprepare(aspeed->clk); err_free_aspeed:

[v3,15/40] fsi: aspeed: Use common initialization and link enable

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Patch