| Message ID | 20240523165353.6547-1-marcin.juszkiewicz@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/1] arm/sbsa-ref: move to Neoverse-N2 as default | expand |
On 2024-05-23 17:53, Marcin Juszkiewicz wrote: > Moving to Neoverse-N2 gives us several cpu features to use for expanding > our platform: > > - branch target identification > - pointer authentication > - RME for confidential computing > - RNG for EFI_PROTOCOL_RNG > - SVE being enabled by default > > We do not go for "max" as default to have stable set of features enabled > by default. It is still supported and can be selected with "--cpu" > argument. I still want to move to max at some point :) But this is a good improvement for now. Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> > Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> > --- > hw/arm/sbsa-ref.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c > index 57c337fd92..e884692f07 100644 > --- a/hw/arm/sbsa-ref.c > +++ b/hw/arm/sbsa-ref.c > @@ -891,7 +891,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data) > > mc->init = sbsa_ref_init; > mc->desc = "QEMU 'SBSA Reference' ARM Virtual Machine"; > - mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n1"); > + mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n2"); > mc->valid_cpu_types = valid_cpu_types; > mc->max_cpus = 512; > mc->pci_allow_0_address = true;
On Thu, 23 May 2024 at 17:54, Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> wrote: > > Moving to Neoverse-N2 gives us several cpu features to use for expanding > our platform: > > - branch target identification > - pointer authentication > - RME for confidential computing > - RNG for EFI_PROTOCOL_RNG > - SVE being enabled by default > > We do not go for "max" as default to have stable set of features enabled > by default. It is still supported and can be selected with "--cpu" > argument. > > Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> > --- Applied to target-arm.next, thanks. -- PMM
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 57c337fd92..e884692f07 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -891,7 +891,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data) mc->init = sbsa_ref_init; mc->desc = "QEMU 'SBSA Reference' ARM Virtual Machine"; - mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n1"); + mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n2"); mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = 512; mc->pci_allow_0_address = true;
Moving to Neoverse-N2 gives us several cpu features to use for expanding our platform: - branch target identification - pointer authentication - RME for confidential computing - RNG for EFI_PROTOCOL_RNG - SVE being enabled by default We do not go for "max" as default to have stable set of features enabled by default. It is still supported and can be selected with "--cpu" argument. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> --- hw/arm/sbsa-ref.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)