diff mbox series

[07/18] tcg/loongarch64: Support LASX in tcg_out_dup_vec

Message ID 20240527211912.14060-8-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg/loongarch64: Support v64 and v256 | expand

Commit Message

Richard Henderson May 27, 2024, 9:19 p.m. UTC
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/loongarch64/tcg-target.c.inc | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

Comments

Song Gao June 17, 2024, 9:52 a.m. UTC | #1
在 2024/5/28 上午5:19, Richard Henderson 写道:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tcg/loongarch64/tcg-target.c.inc | 10 +++++++---
>   1 file changed, 7 insertions(+), 3 deletions(-)
Reviewed-by: Song Gao <gaosong@loongson.cn>

Thanks.
Song Gao
> diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
> index b1d652355d..cc54bc4a53 100644
> --- a/tcg/loongarch64/tcg-target.c.inc
> +++ b/tcg/loongarch64/tcg-target.c.inc
> @@ -1674,12 +1674,16 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>   static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
>                               TCGReg rd, TCGReg rs)
>   {
> -    static const LoongArchInsn repl_insn[4] = {
> -        OPC_VREPLGR2VR_B, OPC_VREPLGR2VR_H, OPC_VREPLGR2VR_W, OPC_VREPLGR2VR_D
> +    static const LoongArchInsn repl_insn[2][4] = {
> +        { OPC_VREPLGR2VR_B, OPC_VREPLGR2VR_H,
> +          OPC_VREPLGR2VR_W, OPC_VREPLGR2VR_D },
> +        { OPC_XVREPLGR2VR_B, OPC_XVREPLGR2VR_H,
> +          OPC_XVREPLGR2VR_W, OPC_XVREPLGR2VR_D },
>       };
> +    bool lasx = type == TCG_TYPE_V256;
>   
>       tcg_debug_assert(vece <= MO_64);
> -    tcg_out32(s, encode_vdj_insn(repl_insn[vece], rd, rs));
> +    tcg_out32(s, encode_vdj_insn(repl_insn[lasx][vece], rd, rs));
>       return true;
>   }
>
diff mbox series

Patch

diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index b1d652355d..cc54bc4a53 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1674,12 +1674,16 @@  static void tcg_out_op(TCGContext *s, TCGOpcode opc,
 static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
                             TCGReg rd, TCGReg rs)
 {
-    static const LoongArchInsn repl_insn[4] = {
-        OPC_VREPLGR2VR_B, OPC_VREPLGR2VR_H, OPC_VREPLGR2VR_W, OPC_VREPLGR2VR_D
+    static const LoongArchInsn repl_insn[2][4] = {
+        { OPC_VREPLGR2VR_B, OPC_VREPLGR2VR_H,
+          OPC_VREPLGR2VR_W, OPC_VREPLGR2VR_D },
+        { OPC_XVREPLGR2VR_B, OPC_XVREPLGR2VR_H,
+          OPC_XVREPLGR2VR_W, OPC_XVREPLGR2VR_D },
     };
+    bool lasx = type == TCG_TYPE_V256;
 
     tcg_debug_assert(vece <= MO_64);
-    tcg_out32(s, encode_vdj_insn(repl_insn[vece], rd, rs));
+    tcg_out32(s, encode_vdj_insn(repl_insn[lasx][vece], rd, rs));
     return true;
 }