Message ID | 1716875836-186791-1-git-send-email-dh10.jung@samsung.com |
---|---|
State | Superseded |
Headers | show |
Series | usb: host: Add a quirk for writing ERST in high-low order | expand |
On Tue, May 28, 2024 at 09:29:21AM +0200, Greg Kroah-Hartman wrote: > On Tue, May 28, 2024 at 09:23:43AM +0200, Greg Kroah-Hartman wrote: > > On Tue, May 28, 2024 at 02:57:16PM +0900, Daehwan Jung wrote: > > > [Synopsys]- The host controller was design to support ERST setting > > > during the RUN state. But since there is a limitation in controller > > > in supporting separate ERSTBA_HI and ERSTBA_LO programming, > > > It is supported when the ERSTBA is programmed in 64bit, > > > or in 32 bit mode ERSTBA_HI before ERSTBA_LO > > > > > > [Synopsys]- The internal initialization of event ring fetches > > > the "Event Ring Segment Table Entry" based on the indication of > > > ERSTBA_LO written. > > Also, what is the "[Synopsys]-" stuff? That's not normally in our > changelogs or documentation for how to write a changelog text, is it? > > thanks, > > greg k-h > Yes, I will modify it. Best Regards, Jung Daehwan
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 3100219..ef768e6 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -2325,7 +2325,10 @@ xhci_add_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir, erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); erst_base &= ERST_BASE_RSVDP; erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP; - xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); + if (xhci->quirks & XHCI_WRITE_64_HI_LO) + hi_lo_writeq(erst_base, &ir->ir_set->erst_base); + else + xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); /* Set the event ring dequeue address of this interrupter */ xhci_set_hc_event_deq(xhci, ir); diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 3041515..8664dd1 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -17,6 +17,7 @@ #include <linux/kernel.h> #include <linux/usb/hcd.h> #include <linux/io-64-nonatomic-lo-hi.h> +#include <linux/io-64-nonatomic-hi-lo.h> /* Code sharing between pci-quirks and xhci hcd */ #include "xhci-ext-caps.h" @@ -1627,6 +1628,7 @@ struct xhci_hcd { #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) #define XHCI_ZHAOXIN_HOST BIT_ULL(46) +#define XHCI_WRITE_64_HI_LO BIT_ULL(47) unsigned int num_active_eps; unsigned int limit_active_eps;
[Synopsys]- The host controller was design to support ERST setting during the RUN state. But since there is a limitation in controller in supporting separate ERSTBA_HI and ERSTBA_LO programming, It is supported when the ERSTBA is programmed in 64bit, or in 32 bit mode ERSTBA_HI before ERSTBA_LO [Synopsys]- The internal initialization of event ring fetches the "Event Ring Segment Table Entry" based on the indication of ERSTBA_LO written. Signed-off-by: Daehwan Jung <dh10.jung@samsung.com> --- drivers/usb/host/xhci-mem.c | 5 ++++- drivers/usb/host/xhci.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-)