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[v2] dt-bindings: PCI: qcom: x1e80100: Make the MHI reg region mandatory

Message ID 20240605-x1e80100-pci-bindings-fix-v2-1-c465e87966fc@linaro.org
State New
Headers show
Series [v2] dt-bindings: PCI: qcom: x1e80100: Make the MHI reg region mandatory | expand

Commit Message

Abel Vesa June 5, 2024, 8:19 a.m. UTC 
All PCIe controllers found on X1E80100 have MHI register region.
So change the schema to reflect that.

Fixes: 692eadd51698 ("dt-bindings: PCI: qcom: Document the X1E80100 PCIe Controller")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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Note that this patch will trigger an MHI reg region
warning until the following patch will also be merged:

https://lore.kernel.org/all/20240604-x1e80100-dts-fixes-pcie6a-v2-1-0b4d8c6256e5@linaro.org/
---
Changes in v2:
- Dropped the vddpe supply change as that will have to be reworked
  in a different way, maybe on multiple platforms.
- Added SoC name to the subject line
- Link to v1: https://lore.kernel.org/r/20240604-x1e80100-pci-bindings-fix-v1-1-f4e20251b3d0@linaro.org
---
 Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)


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base-commit: d97496ca23a2d4ee80b7302849404859d9058bcd
change-id: 20240604-x1e80100-pci-bindings-fix-196925d15260

Best regards,
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Patch

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
index 1074310a8e7a..a9db0a231563 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
@@ -19,11 +19,10 @@  properties:
     const: qcom,pcie-x1e80100
 
   reg:
-    minItems: 5
+    minItems: 6
     maxItems: 6
 
   reg-names:
-    minItems: 5
     items:
       - const: parf # Qualcomm specific registers
       - const: dbi # DesignWare PCIe registers