Message ID | 20240718133312.10324-18-philmd@linaro.org |
---|---|
State | Superseded |
Headers | show
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Thu, 18 Jul 2024 06:34:53 -0700 (PDT) Received: from localhost.localdomain ([176.176.173.113]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-368584ddd6asm1540113f8f.91.2024.07.18.06.34.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 18 Jul 2024 06:34:53 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org> To: Bibo Mao <maobibo@loongson.cn>, qemu-devel@nongnu.org, Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Song Gao <gaosong@loongson.cn>, Paolo Bonzini <pbonzini@redhat.com>, Huacai Chen <chenhuacai@kernel.org>, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>, Xiaojuan Yang <yangxiaojuan@loongson.cn>, Xianglai Li <lixianglai@loongson.cn> Subject: [PATCH v5 17/19] hw/intc/loongson_ipi: Restrict to MIPS Date: Thu, 18 Jul 2024 15:33:09 +0200 Message-ID: <20240718133312.10324-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240718133312.10324-1-philmd@linaro.org> References: <20240718133312.10324-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; 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Series |
Reconstruct loongson ipi driver
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expand
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diff --git a/MAINTAINERS b/MAINTAINERS index a670c8ee67..c2d51b0158 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1250,10 +1250,8 @@ F: hw/loongarch/ F: include/hw/loongarch/virt.h F: include/hw/intc/loongarch_*.h F: include/hw/intc/loongson_ipi_common.h -F: include/hw/intc/loongson_ipi.h F: hw/intc/loongarch_*.c F: hw/intc/loongson_ipi_common.c -F: hw/intc/loongson_ipi.c F: include/hw/pci-host/ls7a.h F: hw/rtc/ls7a_rtc.c F: gdb-xml/loongarch*.xml diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 86badb2972..051e910586 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -16,22 +16,9 @@ #include "exec/address-spaces.h" #include "exec/memory.h" #include "migration/vmstate.h" -#ifdef TARGET_LOONGARCH64 -#include "target/loongarch/cpu.h" -#endif -#ifdef TARGET_MIPS #include "target/mips/cpu.h" -#endif #include "trace.h" -#ifdef TARGET_LOONGARCH64 -static AddressSpace *get_iocsr_as(CPUState *cpu) -{ - return LOONGARCH_CPU(cpu)->env.address_space_iocsr; -} -#endif - -#ifdef TARGET_MIPS static AddressSpace *get_iocsr_as(CPUState *cpu) { if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) { @@ -40,7 +27,6 @@ static AddressSpace *get_iocsr_as(CPUState *cpu) return NULL; } -#endif static const MemoryRegionOps loongson_ipi_core_ops = { .read_with_attrs = loongson_ipi_core_readl,