| Message ID | 5110a64d513390c01daf3b4a6a6fc5560baf77a8.1721377374.git.unicorn_wang@outlook.com |
|---|---|
| State | New |
| Headers | show |
| Series | mmc: sdhci-of-dwcmshc: Add Sophgo SG2042 support | expand |
On Fri, Jul 19, 2024 at 04:47:22PM GMT, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > SG2042 has two MMC controller, one for emmc, another for sd-card. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Please rebase your patch based on sophgo/for-next. Regards, Inochi
On 2024/7/31 15:58, Inochi Amaoto wrote: > On Fri, Jul 19, 2024 at 04:47:22PM GMT, Chen Wang wrote: >> From: Chen Wang <unicorn_wang@outlook.com> >> >> SG2042 has two MMC controller, one for emmc, another for sd-card. >> >> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > Please rebase your patch based on sophgo/for-next. > > Regards, > Inochi As per request from Adrian when reviewing in the first version of this patchset, I was always posting patches based on the latest mmc/next. So I'd like to trouble you to do a rebase when picking to sophgo/for-next, but I don't think the conflict should be too big. BTW, I will send version 6 soon later due to some minor changes after some comments from reviewers. Thanks, Chen
diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts index 49b4b9c2c101..164db23586e0 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts +++ b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts @@ -14,6 +14,23 @@ chosen { }; }; +&emmc { + bus-width = <4>; + no-sdio; + no-sd; + non-removable; + wp-inverted; + status = "okay"; +}; + +&sd { + bus-width = <4>; + no-sdio; + no-mmc; + wp-inverted; + status = "okay"; +}; + &uart0 { status = "okay"; }; diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index 81fda312f988..e3194f147d13 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -346,5 +346,33 @@ uart0: serial@7040000000 { resets = <&rstgen RST_UART0>; status = "disabled"; }; + + emmc: mmc@704002a000 { + compatible = "sophgo,sg2042-dwcmshc"; + reg = <0x70 0x4002a000 0x0 0x1000>; + interrupt-parent = <&intc>; + interrupts = <134 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkgen GATE_CLK_EMMC_100M>, + <&clkgen GATE_CLK_AXI_EMMC>, + <&clkgen GATE_CLK_100K_EMMC>; + clock-names = "core", + "bus", + "timer"; + status = "disabled"; + }; + + sd: mmc@704002b000 { + compatible = "sophgo,sg2042-dwcmshc"; + reg = <0x70 0x4002b000 0x0 0x1000>; + interrupt-parent = <&intc>; + interrupts = <136 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkgen GATE_CLK_SD_100M>, + <&clkgen GATE_CLK_AXI_SD>, + <&clkgen GATE_CLK_100K_SD>; + clock-names = "core", + "bus", + "timer"; + status = "disabled"; + }; }; };