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[5/8] ASoC: SOF: amd: update conditional check for cache register update

Message ID 20240807051341.1616925-5-Vijendar.Mukunda@amd.com
State Superseded
Headers show
Series [1/8] ASoC: SOF: amd: Fix for incorrect acp error satus register offset | expand

Commit Message

Vijendar Mukunda Aug. 7, 2024, 5:13 a.m. UTC 
Instead of desc->rev, use acp pci revision id(pci_rev) for cache register
conditional check.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
---
 sound/soc/sof/amd/acp-loader.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/sound/soc/sof/amd/acp-loader.c b/sound/soc/sof/amd/acp-loader.c
index 2d5e58846499..19f10dd77e4b 100644
--- a/sound/soc/sof/amd/acp-loader.c
+++ b/sound/soc/sof/amd/acp-loader.c
@@ -219,7 +219,7 @@  int acp_dsp_pre_fw_run(struct snd_sof_dev *sdev)
 			dev_err(sdev->dev, "acp dma transfer status: %d\n", ret);
 	}
 
-	if (desc->rev > 3) {
+	if (adata->pci_rev > ACP_RN_PCI_ID) {
 		/* Cache Window enable */
 		snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DSP0_CACHE_OFFSET0, desc->sram_pte_offset);
 		snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DSP0_CACHE_SIZE0, SRAM1_SIZE | BIT(31));