| Message ID | 20240827045757.1101194-7-quic_srichara@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Enable IPQ5018 PCI support | expand |
On 8/29/2024 2:40 PM, Dmitry Baryshkov wrote: > On Tue, Aug 27, 2024 at 10:27:57AM GMT, Sricharan R wrote: >> From: Nitheesh Sekar <quic_nsekar@quicinc.com> >> >> Enable the PCIe controller and PHY nodes for RDP 432-c2. >> >> Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> >> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> >> --- >> [v2] Moved status as last property >> >> arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts >> index 8460b538eb6a..2b253da7f776 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts >> +++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts >> @@ -28,6 +28,15 @@ &blsp1_uart1 { >> status = "okay"; >> }; >> >> +&pcie1 { >> + perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>; > > pinctrl? wake-gpios? > ok, will add to make it explicit. Otherwise pinctrl was default muxed. Regards, Sricharan
diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts index 8460b538eb6a..2b253da7f776 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts +++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts @@ -28,6 +28,15 @@ &blsp1_uart1 { status = "okay"; }; +&pcie1 { + perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&pcie_x2phy { + status = "okay"; +}; + &sdhc_1 { pinctrl-0 = <&sdc_default_state>; pinctrl-names = "default";