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[v5,2/3] tty: serial: samsung: Fix A7-A11 serial earlycon SError

Message ID 20240911050741.14477-3-towinchenmi@gmail.com
State New
Headers show
Series tty: serial: samsung: Serial fixes for Apple A7-A11 SoCs | expand

Commit Message

Nick Chan Sept. 11, 2024, 5:02 a.m. UTC 
Apple's earlier SoCs, like A7-A11, requires 32-bit writes for the serial
port. Otherwise, a SError happens when writing to UTXH (+0x20). This only
manifested in earlycon as reg-io-width in the device tree is consulted
for normal serial writes.

Change the iotype of the port to UPIO_MEM32, to allow the serial port to
function on A7-A11 SoCs. This change does not appear to affect Apple M1 and
above.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
---
 drivers/tty/serial/samsung_tty.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Andi Shyti Sept. 11, 2024, 6:57 a.m. UTC | #1 
Hi Nick,

On Wed, Sep 11, 2024 at 01:02:12PM GMT, Nick Chan wrote:
> Apple's earlier SoCs, like A7-A11, requires 32-bit writes for the serial
> port. Otherwise, a SError happens when writing to UTXH (+0x20). This only
> manifested in earlycon as reg-io-width in the device tree is consulted
> for normal serial writes.
> 
> Change the iotype of the port to UPIO_MEM32, to allow the serial port to
> function on A7-A11 SoCs. This change does not appear to affect Apple M1 and
> above.
> 
> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
> Reviewed-by: Neal Gompa <neal@gompa.dev>
> Tested-by: Janne Grunau <j@jannau.net>
> Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Reviewed-by: Andi Shyti <andi.shyti@kernel.org>

Andi
diff mbox series

Patch

diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index c4f2ac9518aa..3fdec06322ac 100644
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -2536,7 +2536,7 @@  static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = {
 		.name		= "Apple S5L UART",
 		.type		= TYPE_APPLE_S5L,
 		.port_type	= PORT_8250,
-		.iotype		= UPIO_MEM,
+		.iotype		= UPIO_MEM32,
 		.fifosize	= 16,
 		.rx_fifomask	= S3C2410_UFSTAT_RXMASK,
 		.rx_fifoshift	= S3C2410_UFSTAT_RXSHIFT,
@@ -2822,6 +2822,9 @@  OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup);
 static int __init apple_s5l_early_console_setup(struct earlycon_device *device,
 						const char *opt)
 {
+	/* Apple A7-A11 requires MMIO32 register accesses. */
+	device->port.iotype = UPIO_MEM32;
+
 	/* Close enough to S3C2410 for earlycon... */
 	device->port.private_data = &s3c2410_early_console_data;