diff mbox series

[v2,3/3] pinctrl: renesas: rzg2l: Add support for configuring schmitt-trigger

Message ID 20241004123658.764557-4-prabhakar.mahadev-lad.rj@bp.renesas.com
State New
Headers show
Series pinctrl: renesas: rzg2l: Add support to configure open-drain and schmitt-trigger properties | expand

Commit Message

Prabhakar Oct. 4, 2024, 12:36 p.m. UTC 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add support for configuring the multiplexed pins as schmitt-trigger
inputs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v1->v2
- Included RB tag
---
 drivers/pinctrl/renesas/pinctrl-rzg2l.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

Geert Uytterhoeven Oct. 4, 2024, 1:06 p.m. UTC | #1 
On Fri, Oct 4, 2024 at 2:37 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add support for configuring the multiplexed pins as schmitt-trigger
> inputs.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v1->v2
> - Included RB tag

Thanks, will queue in renesas-pinctrl for v6.13.

Gr{oetje,eeting}s,

                        Geert
Claudiu Beznea Oct. 9, 2024, 7:53 a.m. UTC | #2 
On 04.10.2024 15:36, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Add support for configuring the multiplexed pins as schmitt-trigger
> inputs.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Same here:
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

> ---
 v1->v2

> - Included RB tag
> ---
>  drivers/pinctrl/renesas/pinctrl-rzg2l.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> index 8d576cc74003..13708c71f938 100644
> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -140,6 +140,7 @@
>  #define PUPD(off)		(0x1C00 + (off) * 8)
>  #define ISEL(off)		(0x2C00 + (off) * 8)
>  #define NOD(off)		(0x3000 + (off) * 8)
> +#define SMT(off)		(0x3400 + (off) * 8)
>  #define SD_CH(off, ch)		((off) + (ch) * 4)
>  #define ETH_POC(off, ch)	((off) + (ch) * 4)
>  #define QSPI			(0x3008)
> @@ -162,6 +163,7 @@
>  #define SR_MASK			0x01
>  #define PUPD_MASK		0x03
>  #define NOD_MASK		0x01
> +#define SMT_MASK		0x01
>  
>  #define PM_INPUT		0x1
>  #define PM_OUTPUT		0x2
> @@ -1351,6 +1353,15 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
>  			return -EINVAL;
>  		break;
>  
> +	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
> +		if (!(cfg & PIN_CFG_SMT))
> +			return -EINVAL;
> +
> +		arg = rzg2l_read_pin_config(pctrl, SMT(off), bit, SMT_MASK);
> +		if (!arg)
> +			return -EINVAL;
> +		break;
> +
>  	case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE:
>  		if (!(cfg & PIN_CFG_IOLH_RZV2H))
>  			return -EINVAL;
> @@ -1489,6 +1500,13 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
>  					     param == PIN_CONFIG_DRIVE_OPEN_DRAIN ? 1 : 0);
>  			break;
>  
> +		case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
> +			if (!(cfg & PIN_CFG_SMT))
> +				return -EINVAL;
> +
> +			rzg2l_rmw_pin_config(pctrl, SMT(off), bit, SMT_MASK, arg);
> +			break;
> +
>  		case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE:
>  			if (!(cfg & PIN_CFG_IOLH_RZV2H))
>  				return -EINVAL;
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 8d576cc74003..13708c71f938 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -140,6 +140,7 @@ 
 #define PUPD(off)		(0x1C00 + (off) * 8)
 #define ISEL(off)		(0x2C00 + (off) * 8)
 #define NOD(off)		(0x3000 + (off) * 8)
+#define SMT(off)		(0x3400 + (off) * 8)
 #define SD_CH(off, ch)		((off) + (ch) * 4)
 #define ETH_POC(off, ch)	((off) + (ch) * 4)
 #define QSPI			(0x3008)
@@ -162,6 +163,7 @@ 
 #define SR_MASK			0x01
 #define PUPD_MASK		0x03
 #define NOD_MASK		0x01
+#define SMT_MASK		0x01
 
 #define PM_INPUT		0x1
 #define PM_OUTPUT		0x2
@@ -1351,6 +1353,15 @@  static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
 			return -EINVAL;
 		break;
 
+	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+		if (!(cfg & PIN_CFG_SMT))
+			return -EINVAL;
+
+		arg = rzg2l_read_pin_config(pctrl, SMT(off), bit, SMT_MASK);
+		if (!arg)
+			return -EINVAL;
+		break;
+
 	case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE:
 		if (!(cfg & PIN_CFG_IOLH_RZV2H))
 			return -EINVAL;
@@ -1489,6 +1500,13 @@  static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
 					     param == PIN_CONFIG_DRIVE_OPEN_DRAIN ? 1 : 0);
 			break;
 
+		case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+			if (!(cfg & PIN_CFG_SMT))
+				return -EINVAL;
+
+			rzg2l_rmw_pin_config(pctrl, SMT(off), bit, SMT_MASK, arg);
+			break;
+
 		case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE:
 			if (!(cfg & PIN_CFG_IOLH_RZV2H))
 				return -EINVAL;