From patchwork Tue Nov 22 15:50:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 83423 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp2165840qge; Tue, 22 Nov 2016 07:50:35 -0800 (PST) X-Received: by 10.84.169.36 with SMTP id g33mr953304plb.174.1479829835767; Tue, 22 Nov 2016 07:50:35 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 31si413574plj.195.2016.11.22.07.50.35; Tue, 22 Nov 2016 07:50:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756150AbcKVPuS (ORCPT + 26 others); Tue, 22 Nov 2016 10:50:18 -0500 Received: from mail-wm0-f42.google.com ([74.125.82.42]:36613 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755844AbcKVPuI (ORCPT ); Tue, 22 Nov 2016 10:50:08 -0500 Received: by mail-wm0-f42.google.com with SMTP id g23so32004701wme.1 for ; Tue, 22 Nov 2016 07:50:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=8B33xuExrSG9n47Dn3DnnMbNukwoA1hUjUKiFP8Req8=; b=foixT51TZbKzMuT1yL1bZvdvt/uGlBYSV3/YV3zmvwn5Vpp2mfcp4BsJ5y+bVBM1gI Oz1Rq0aPV/rT+dPVEp/52dez4HvnWgpf/SOOZOA438FfatSHeLFeqBmwSB8iWFD7IhTC 85fXAQl3Iy72p/lwaHoxwgnwjQp/xOass+YVw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=8B33xuExrSG9n47Dn3DnnMbNukwoA1hUjUKiFP8Req8=; b=fBhT3q/AtEqxkbhacDa6r/VX+vLuOc9Zxs8MNU846C4S+naugLagcBqxgEFOyG4sNk AT2DkjQ1Fdj7md0cwvgSEHqMBNFmESZfn0eNLWVTQCFpWGOj4yj3z+3vsC2x3QV5oC5Z iar+nLJXnt4PdrNt5ynlGmjyWevAoV4615USkrWhhTS4+SVFw8jaGlcDuF9Bz7d1URD5 c8eiz3f6MsFktFXr4HOBCKX2WVMwvBDsprfyixdBujgcKrBG9QIH3YLuIGTiyPLASaGM 8E/e/SwZz1FsSdd5T4gi+L6WD6loRbBSNClk1dWxIViWbBPAbdApWsDPwVCZSzMEv2Zy RCNw== X-Gm-Message-State: AKaTC028/GE4/Ugcom5/Y8To5u3bfMrUf588kjvDCZBAwvnpPSl+JOozK4Yvh7numyDCl0hi X-Received: by 10.194.44.41 with SMTP id b9mr17895794wjm.56.1479829807272; Tue, 22 Nov 2016 07:50:07 -0800 (PST) Received: from mms-0441.wifi.mm-sol.com ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id l2sm31572628wji.7.2016.11.22.07.50.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Nov 2016 07:50:06 -0800 (PST) From: Georgi Djakov To: adrian.hunter@intel.com, ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, riteshh@codeaurora.org, georgi.djakov@linaro.org Subject: [PATCH] mmc: sdhci-msm: Add sdhci_reset() implementation Date: Tue, 22 Nov 2016 17:50:05 +0200 Message-Id: <20161122155005.16910-1-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.10.2 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On apq8016, apq8084 and apq8074 platforms, when we want to do a software reset, we need to poke some additional vendor specific registers. If we don't do so, the following error message appears: mmc0: Reset 0x1 never completed. sdhci: =========== REGISTER DUMP (mmc0)=========== sdhci: Sys addr: 0x00000000 | Version: 0x00002e02 sdhci: Blk size: 0x00004000 | Blk cnt: 0x00000000 sdhci: Argument: 0x00000000 | Trn mode: 0x00000000 sdhci: Present: 0x01f80000 | Host ctl: 0x00000000 sdhci: Power: 0x00000000 | Blk gap: 0x00000000 sdhci: Wake-up: 0x00000000 | Clock: 0x00000003 sdhci: Timeout: 0x00000000 | Int stat: 0x00000000 sdhci: Int enab: 0x00000000 | Sig enab: 0x00000000 sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000 sdhci: Caps: 0x322dc8b2 | Caps_1: 0x00008007 sdhci: Cmd: 0x00000000 | Max curr: 0x00000000 sdhci: Host ctl2: 0x00000000 sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000000000000 sdhci: =========================================== Fix it by implementing the custom sdhci_reset() function, which does what is needed. Signed-off-by: Georgi Djakov --- drivers/mmc/host/sdhci-msm.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 8ef44a2a2fd9..87a124a37408 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -505,6 +505,23 @@ static irqreturn_t sdhci_msm_pwr_irq(int irq, void *data) return IRQ_HANDLED; } +void sdhci_msm_reset(struct sdhci_host *host, u8 mask) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); + + if (mask & SDHCI_RESET_ALL) { + u32 val = readl_relaxed(msm_host->core_mem + CORE_POWER); + + val |= CORE_SW_RST; + writel_relaxed(val, msm_host->core_mem + CORE_POWER); + + sdhci_msm_voltage_switch(host); + } + + sdhci_reset(host, mask); +} + static const struct of_device_id sdhci_msm_dt_match[] = { { .compatible = "qcom,sdhci-msm-v4" }, {}, @@ -514,7 +531,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_match); static const struct sdhci_ops sdhci_msm_ops = { .platform_execute_tuning = sdhci_msm_execute_tuning, - .reset = sdhci_reset, + .reset = sdhci_msm_reset, .set_clock = sdhci_set_clock, .set_bus_width = sdhci_set_bus_width, .set_uhs_signaling = sdhci_msm_set_uhs_signaling,