@@ -5,6 +5,7 @@
/dts-v1/;
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/gpio/gpio.h>
#include "qcs615.dtsi"
#include "qcs615-pmic.dtsi"
@@ -201,6 +202,60 @@ vreg_l17a: ldo17 {
};
};
+ðernet {
+ status = "okay";
+
+ pinctrl-0 = <ðernet_defaults>;
+ pinctrl-names = "default";
+
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii";
+ max-speed = <1000>;
+
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+
+ mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy: phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x7>;
+
+ interrupts-extended = <&tlmm 121 IRQ_TYPE_EDGE_FALLING>;
+ device_type = "ethernet-phy";
+ reset-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <11000>;
+ reset-deassert-us = <70000>;
+ };
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ snps,rx-sched-sp;
+
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,route-up;
+ snps,priority = <0x1>;
+ };
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <1>;
+ snps,tx-sched-wrr;
+
+ queue0 {
+ snps,weight = <0x10>;
+ snps,dcb-algorithm;
+ snps,priority = <0x0>;
+ };
+ };
+};
+
&gcc {
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
@@ -292,6 +347,56 @@ &mdss_dsi0_phy {
vdds-supply = <&vreg_l5a>;
};
+&tlmm {
+ ethernet_defaults: ethernet-defaults-state {
+ mdc-pins {
+ pins = "gpio113";
+ function = "rgmii";
+ bias-pull-up;
+ };
+
+ mdio-pins {
+ pins = "gpio114";
+ function = "rgmii";
+ bias-pull-up;
+ };
+
+ rgmii-rx-pins {
+ pins = "gpio81", "gpio82", "gpio83", "gpio102", "gpio103", "gpio112";
+ function = "rgmii";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ rgmii-tx-pins {
+ pins = "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97";
+ function = "rgmii";
+ bias-pull-up;
+ drive-strength = <16>;
+ };
+
+ phy-intr-pins {
+ pins = "gpio121";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <8>;
+ };
+
+ pps-pins {
+ pins = "gpio91";
+ function = "rgmii";
+ bias-disable;
+ drive-strength = <8>;
+ };
+
+ phy-reset-pins {
+ pins = "gpio104";
+ function = "gpio";
+ bias-pull-up;
+ drive-strength = <16>;
+ };
+ };
+};
&tlmm {
ioexp_intr_active: ioexp_intr_active {
Enable the ethernet node, add the phy node and pinctrl for ethernet. Signed-off-by: Yijie Yang <quic_yijiyang@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs615-ride.dts | 105 +++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+)