@@ -202,6 +202,7 @@ struct dpu_crtc {
* @mixers : List of active mixers
* @num_ctls : Number of ctl paths in use
* @hw_ctls : List of active ctl paths
+ * @num_dscs : Number of DSCs in use
* @crc_source : CRC source
* @crc_frame_skip_count: Number of frames skipped before getting CRC
*/
@@ -223,6 +224,7 @@ struct dpu_crtc_state {
u32 num_ctls;
struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS];
+ u32 num_dscs;
enum dpu_crtc_crc_source crc_source;
int crc_frame_skip_count;
};
@@ -548,14 +548,14 @@ bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc)
{
struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
int i, intf_count = 0, num_dsc = 0;
+ struct dpu_crtc_state *cstate = to_dpu_crtc_state(drm_enc->crtc->state);
for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++)
if (dpu_enc->phys_encs[i])
intf_count++;
- /* See dpu_encoder_get_topology, we only support 2:2:1 topology */
if (dpu_enc->dsc)
- num_dsc = 2;
+ num_dsc = cstate->num_dscs;
return (num_dsc > 0) && (num_dsc > intf_count);
}
@@ -1169,6 +1169,7 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc,
cstate->mixers[i].hw_dspp = to_dpu_hw_dspp(hw_dspp[i]);
}
+ cstate->num_dscs = num_dsc;
cstate->num_mixers = num_lm;
dpu_enc->connector = conn_state->connector;
If DSC is enabled, the only case is with 2 DSC engines so far. More usage case will be added, such as 4 DSC in 4:4:2 topoplogy. So get real number of DSCs to decide whether DSC merge is needed. Signed-off-by: Jun Nie <jun.nie@linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 +++-- 2 files changed, 5 insertions(+), 2 deletions(-)