Message ID | 20241011055231.9826-5-kfting@nuvoton.com |
---|---|
State | Superseded |
Headers | show |
Series | i2c: npcm: read/write operation, checkpatch | expand |
Hi Andy: Thank you for your feedback. Andy Shevchenko <andriy.shevchenko@linux.intel.com> 於 2024年10月11日 週五 下午7:02寫道: > > On Fri, Oct 11, 2024 at 01:52:31PM +0800, Tyrone Ting wrote: > > From: Charles Boyer <Charles.Boyer@fii-usa.com> > > > > Nuvoton slave enable was in user space API call master_xfer, so it is > > subject to delays from the OS scheduler. If the BMC is not enabled for > > slave mode in time for master to send response, then it will NAK the > > address match. Then the PLDM request timeout occurs. > > > > If the slave enable is moved to the EOB interrupt service routine, then > > the BMC can be ready in slave mode by the time it needs to receive a > > response. > > ... > > > +#if IS_ENABLED(CONFIG_I2C_SLAVE) > > + /* reenable slave if it was enabled */ > > + if (bus->slave) > > + iowrite8((bus->slave->addr & 0x7F) | NPCM_I2CADDR_SAEN, > > GENMASK()? > But why do we need it? Do we expect this to be 10-bit address or...? > 0x7f is going to be removed in the next patch set. > > + bus->reg + NPCM_I2CADDR1); > > +#endif > > -- > With Best Regards, > Andy Shevchenko > > Thank you. Regards, Tyrone
diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c index fcecb098298f..55348308b992 100644 --- a/drivers/i2c/busses/i2c-npcm7xx.c +++ b/drivers/i2c/busses/i2c-npcm7xx.c @@ -1925,6 +1925,12 @@ static int npcm_i2c_int_master_handler(struct npcm_i2c *bus) (FIELD_GET(NPCM_I2CCST3_EO_BUSY, ioread8(bus->reg + NPCM_I2CCST3)))) { npcm_i2c_irq_handle_eob(bus); +#if IS_ENABLED(CONFIG_I2C_SLAVE) + /* reenable slave if it was enabled */ + if (bus->slave) + iowrite8((bus->slave->addr & 0x7F) | NPCM_I2CADDR_SAEN, + bus->reg + NPCM_I2CADDR1); +#endif return 0; }