@@ -1040,10 +1040,12 @@ static int mmc_select_hs_ddr(struct mmc_card *card)
ext_csd_bits = (bus_width == MMC_BUS_WIDTH_8) ?
EXT_CSD_DDR_BUS_WIDTH_8 : EXT_CSD_DDR_BUS_WIDTH_4;
- err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_BUS_WIDTH,
- ext_csd_bits,
- card->ext_csd.generic_cmd6_time);
+ err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_BUS_WIDTH,
+ ext_csd_bits,
+ card->ext_csd.generic_cmd6_time,
+ MMC_TIMING_MMC_DDR52,
+ true, true, true);
if (err) {
pr_err("%s: switch to bus width %d ddr failed\n",
mmc_hostname(host), 1 << bus_width);
@@ -1086,9 +1088,6 @@ static int mmc_select_hs_ddr(struct mmc_card *card)
if (err)
err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330);
- if (!err)
- mmc_set_timing(host, MMC_TIMING_MMC_DDR52);
-
return err;
}
According to the JEDEC specification, during bus timing change operations for mmc, sending a CMD13 could trigger CRC errors. As switching to HS DDR mode indeed causes a bus timing change, polling with CMD13 to detect card busy, may thus potentially trigger CRC errors. Currently these errors are treated as the switch to HS DDR mode failed. To improve this behaviour, let's instead tell __mmc_switch() to retry when it encounters CRC errors during polling. Moreover, when switching to HS DDR mode, let's make sure the CMD13 polling is done by having the mmc host and the mmc card, being configured to operate at the same selected bus speed timing. Fix this by providing MMC_TIMING_MMC_DDR52 as the timing parameter to __mmc_switch(). Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> --- drivers/mmc/core/mmc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) -- 1.9.1