| Message ID | 20241015004945.3676-5-jonathan@marek.ca |
|---|---|
| State | New |
| Headers | show |
| Series | x1e80100 RTC support | expand |
On 15.10.2024 2:47 AM, Jonathan Marek wrote: > See commit e67b45582c5e for explanation. > > Note: the 0xbc offset is arbitrary, it just needs to not be already in use. > > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > --- > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > index 6dfc85eda3540..eb6b735c41453 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts > @@ -1224,6 +1224,17 @@ edp_bl_en: edp-bl-en-state { > }; > }; > > +&pmk8550_rtc { > + nvmem-cells = <&rtc_offset>; > + nvmem-cell-names = "offset"; > +}; > + > +&pmk8550_sdam_2 { > + rtc_offset: rtc-offset@bc { > + reg = <0xbc 0x4>; > + }; > +}; Setting random bits in SDAM is a very very very very bad idea I'll try to get a good spot for the offset internally Konrad
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 6dfc85eda3540..eb6b735c41453 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -1224,6 +1224,17 @@ edp_bl_en: edp-bl-en-state { }; }; +&pmk8550_rtc { + nvmem-cells = <&rtc_offset>; + nvmem-cell-names = "offset"; +}; + +&pmk8550_sdam_2 { + rtc_offset: rtc-offset@bc { + reg = <0xbc 0x4>; + }; +}; + &qupv3_0 { status = "okay"; };
See commit e67b45582c5e for explanation. Note: the 0xbc offset is arbitrary, it just needs to not be already in use. Signed-off-by: Jonathan Marek <jonathan@marek.ca> --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 11 +++++++++++ 1 file changed, 11 insertions(+)