[1/6] arm64: defconfig: Enable SX150X

Message ID	20241014-add_display_support_for_qcs615-v1-1-4efa191dbdd4@quicinc.com
State	New
Headers	show Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1C601547EF for <linux-arm-msm@vger.kernel.org>; Mon, 14 Oct 2024 09:47:42 +0000 (UTC) From: fangez via B4 Relay <devnull+quic_fangez.quicinc.com@kernel.org> Date: Mon, 14 Oct 2024 17:47:27 +0800 Subject: [PATCH 1/6] arm64: defconfig: Enable SX150X Precedence: bulk MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20241014-add_display_support_for_qcs615-v1-1-4efa191dbdd4@quicinc.com> References: <20241014-add_display_support_for_qcs615-v1-0-4efa191dbdd4@quicinc.com> In-Reply-To: <20241014-add_display_support_for_qcs615-v1-0-4efa191dbdd4@quicinc.com> To: kernel@quicinc.com, quic_lliu6@quicinc.com, quic_fangez@quicinc.com, quic_xiangxuy@quicinc.com Cc: linux-arm-msm@vger.kernel.org Reply-To: quic_fangez@quicinc.com
Series	add_display_support_for_QCS615 \| expand [0/6] add_display_support_for_QCS615 [1/6] arm64: defconfig: Enable SX150X [2/6] arm64: dts: qcom: qcs615: Add display mdss and dsi configuration [3/6] drm/msm/dpu: Add QCS615 support [4/6] dt-bindings: display/msm: Add QCS615 DSI phy [5/6] dt-bindings: display/msm: Add QCS615 MDSS & DPU [6/6] dt-bindings: display/msm: dsi-controller-main: Document QCS615

Message ID

20241014-add_display_support_for_qcs615-v1-1-4efa191dbdd4@quicinc.com

State

New

Headers

From: fangez via B4 Relay <devnull+quic_fangez.quicinc.com@kernel.org>
Date: Mon, 14 Oct 2024 17:47:27 +0800
Subject: [PATCH 1/6] arm64: defconfig: Enable SX150X
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 <20241014-add_display_support_for_qcs615-v1-1-4efa191dbdd4@quicinc.com>
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 quic_xiangxuy@quicinc.com
Cc: linux-arm-msm@vger.kernel.org
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Series

add_display_support_for_QCS615 | expand

Commit Message

fangez via B4 Relay Oct. 14, 2024, 9:47 a.m. UTC

From: lliu6 <quic_lliu6@quicinc.com>

Enable SX150X pinctrl driver.

Signed-off-by: lliu6 <quic_lliu6@quicinc.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 76f3a6ee93e979e9e39cb0283699a2753b0dddf4..13ff005ebe0e9cfcf171b08add24465d0ab94f05 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -630,6 +630,7 @@  CONFIG_PINCTRL_SM8350=y
 CONFIG_PINCTRL_SM8450=y
 CONFIG_PINCTRL_SM8550=y
 CONFIG_PINCTRL_SM8650=y
+CONFIG_PINCTRL_SX150X=y
 CONFIG_PINCTRL_X1E80100=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
 CONFIG_PINCTRL_LPASS_LPI=m

[1/6] arm64: defconfig: Enable SX150X

Commit Message

Patch