| Message ID | 20241023033432.1353830-1-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Wed, 23 Oct 2024 at 04:34, Richard Henderson <richard.henderson@linaro.org> wrote: > > The following changes since commit 6f625ce2f21d6a1243065d236298277c56f972d5: > > Merge tag 'pull-request-2024-10-21' of https://gitlab.com/thuth/qemu into staging (2024-10-21 17:12:59 +0100) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241022 > > for you to fetch changes up to 310df7a9fe400f32cde8a7edf80daad12cd9cf02: > > linux-user/riscv: Fix definition of RISCV_HWPROBE_EXT_ZVFHMIN (2024-10-22 13:45:03 -0700) > > ---------------------------------------------------------------- > tcg: Reset data_gen_ptr correctly > tcg/riscv: Implement host vector support > tcg/ppc: Fix tcg_out_rlw_rc > target/i386: Walk NPT in guest real mode > target/i386: Use probe_access_full_mmu in ptw_translate > linux-user: Fix build failure caused by missing __u64 on musl > linux-user: Emulate /proc/self/maps under mmap_lock > linux-user/riscv: Fix definition of RISCV_HWPROBE_EXT_ZVFHMIN > linux-user/ppc: Fix sigmask endianness issue in sigreturn > Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/9.2 for any user-visible changes. -- PMM
The following changes since commit 6f625ce2f21d6a1243065d236298277c56f972d5: Merge tag 'pull-request-2024-10-21' of https://gitlab.com/thuth/qemu into staging (2024-10-21 17:12:59 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20241022 for you to fetch changes up to 310df7a9fe400f32cde8a7edf80daad12cd9cf02: linux-user/riscv: Fix definition of RISCV_HWPROBE_EXT_ZVFHMIN (2024-10-22 13:45:03 -0700) ---------------------------------------------------------------- tcg: Reset data_gen_ptr correctly tcg/riscv: Implement host vector support tcg/ppc: Fix tcg_out_rlw_rc target/i386: Walk NPT in guest real mode target/i386: Use probe_access_full_mmu in ptw_translate linux-user: Fix build failure caused by missing __u64 on musl linux-user: Emulate /proc/self/maps under mmap_lock linux-user/riscv: Fix definition of RISCV_HWPROBE_EXT_ZVFHMIN linux-user/ppc: Fix sigmask endianness issue in sigreturn ---------------------------------------------------------------- Alexander Graf (1): target/i386: Walk NPT in guest real mode Dani Szebenyi (1): tcg/ppc: Fix tcg_out_rlw_rc Huang Shiyuan (1): tcg/riscv: Add basic support for vector Ilya Leoshkevich (3): linux-user: Emulate /proc/self/maps under mmap_lock linux-user/ppc: Fix sigmask endianness issue in sigreturn linux-user: Trace rt_sigprocmask's sigsets Richard Henderson (6): tcg: Reset data_gen_ptr correctly disas/riscv: Fix vsetivli disassembly tcg/riscv: Accept constant first argument to sub_vec include/exec: Improve probe_access_full{, _mmu} documentation target/i386: Use probe_access_full_mmu in ptw_translate target/i386: Remove ra parameter from ptw_translate TANG Tiancheng (10): util: Add RISC-V vector extension probe in cpuinfo tcg/riscv: Implement vector mov/dup{m/i} tcg/riscv: Add support for basic vector opcodes tcg/riscv: Implement vector cmp/cmpsel ops tcg/riscv: Implement vector neg ops tcg/riscv: Implement vector sat/mul ops tcg/riscv: Implement vector min/max ops tcg/riscv: Implement vector shi/s/v ops tcg/riscv: Implement vector roti/v/x ops tcg/riscv: Enable native vector support for TCG host Yao Zi (2): linux-user: Fix build failure caused by missing __u64 on musl linux-user/riscv: Fix definition of RISCV_HWPROBE_EXT_ZVFHMIN disas/riscv.h | 2 +- host/include/riscv/host/cpuinfo.h | 2 + include/exec/exec-all.h | 29 +- include/tcg/tcg.h | 6 + linux-user/syscall_defs.h | 6 +- tcg/riscv/tcg-target-con-set.h | 9 + tcg/riscv/tcg-target-con-str.h | 3 + tcg/riscv/tcg-target.h | 78 +-- tcg/riscv/tcg-target.opc.h | 12 + disas/riscv.c | 2 +- linux-user/ppc/signal.c | 2 +- linux-user/strace.c | 88 +++- linux-user/syscall.c | 6 +- target/i386/tcg/sysemu/excp_helper.c | 45 +- tcg/tcg.c | 2 +- util/cpuinfo-riscv.c | 34 +- linux-user/strace.list | 3 +- tcg/ppc/tcg-target.c.inc | 4 +- tcg/riscv/tcg-target.c.inc | 994 ++++++++++++++++++++++++++++++++--- 19 files changed, 1152 insertions(+), 175 deletions(-) create mode 100644 tcg/riscv/tcg-target.opc.h